drivers/intel/fsp2_0: Add timestamps for loading FSPM & FSPS

The loads of the FSPM and FSPS binaries are not insignificant amounts of
time, and without these timestamps, it's not clear what's going on in
those time blocks.  For FSPM, the timestamps can run together to make it
look like that time is still part of the romstage init time.

Example:
   6:end of verified boot                              387,390 (5,402)
  13:starting to load romstage                         401,931 (14,541)
  14:finished loading romstage                         420,560 (18,629)
 970:loading FSP-M                                     450,698 (30,138)
  15:starting LZMA decompress (ignore for x86)         464,173 (13,475)
  16:finished LZMA decompress (ignore for x86)         517,860 (53,687)
...
   9:finished loading ramstage                         737,191 (18,377)
  10:start of ramstage                                 757,584 (20,393)
  30:device enumeration                                790,382 (32,798)
 971:loading FSP-S                                     840,186 (49,804)
  15:starting LZMA decompress (ignore for x86)         853,834 (13,648)
  16:finished LZMA decompress (ignore for x86)         888,830 (34,996)

BUG=b:188981986
TEST=Build & Boot guybrush, look at timestamps.

Signed-off-by: Martin Roth <martinroth@chromium.org>
Change-Id: I5796d4cdd512799c2eafee45a8ef561de5258b91
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52867
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
diff --git a/src/commonlib/include/commonlib/timestamp_serialized.h b/src/commonlib/include/commonlib/timestamp_serialized.h
index a572150..e49ba3e 100644
--- a/src/commonlib/include/commonlib/timestamp_serialized.h
+++ b/src/commonlib/include/commonlib/timestamp_serialized.h
@@ -119,6 +119,8 @@
 	TS_FSP_AFTER_END_OF_FIRMWARE = 961,
 	TS_FSP_MULTI_PHASE_SI_INIT_START = 962,
 	TS_FSP_MULTI_PHASE_SI_INIT_END = 963,
+	TS_FSP_MEMORY_INIT_LOAD = 970,
+	TS_FSP_SILICON_INIT_LOAD = 971,
 
 	/* 1000+ reserved for payloads (1000-1200: ChromeOS depthcharge) */
 
@@ -261,6 +263,10 @@
 	{ TS_FSP_BEFORE_END_OF_FIRMWARE, "calling FspNotify(EndOfFirmware)" },
 	{ TS_FSP_AFTER_END_OF_FIRMWARE,
 		"returning from FspNotify(EndOfFirmware)" },
+
+	{ TS_FSP_MEMORY_INIT_LOAD, "loading FSP-M" },
+	{ TS_FSP_SILICON_INIT_LOAD, "loading FSP-S" },
+
 	{ TS_START_POSTCAR,	"start of postcar" },
 	{ TS_END_POSTCAR,	"end of postcar" },
 };
diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c
index bbc26bc..b12229d 100644
--- a/src/drivers/intel/fsp2_0/memory_init.c
+++ b/src/drivers/intel/fsp2_0/memory_init.c
@@ -379,6 +379,7 @@
 			_car_unallocated_start - _car_region_start, 0);
 	memranges_insert(memmap, (uintptr_t)_program, REGION_SIZE(program), 0);
 
+	timestamp_add_now(TS_FSP_MEMORY_INIT_LOAD);
 	if (fsp_load_component(&fspld, hdr) != CB_SUCCESS)
 		die("FSPM not available or failed to load!\n");
 
diff --git a/src/drivers/intel/fsp2_0/silicon_init.c b/src/drivers/intel/fsp2_0/silicon_init.c
index 53c9626..a43cc9d 100644
--- a/src/drivers/intel/fsp2_0/silicon_init.c
+++ b/src/drivers/intel/fsp2_0/silicon_init.c
@@ -220,6 +220,7 @@
 
 void fsp_silicon_init(void)
 {
+	timestamp_add_now(TS_FSP_SILICON_INIT_LOAD);
 	fsps_load();
 	do_silicon_init(&fsps_hdr);
 }