commit 14222d86785d89415c014dab294205fd186b7084
author Kyösti Mälkki <kyosti.malkki@gmail.com> Mon Aug 05 15:10:18 2019 +0300
committer Kyösti Mälkki <kyosti.malkki@gmail.com> Thu Aug 08 04:53:18 2019 +0000
tree 8760046ac6e86fc86b3d570a2e7281dc6e42fafd
parent 9970b61ad3049d87650cd7b4eb5f47d667098186

arch/x86: Change smm_subregion() prototype

Do this to avoid some amount of explicit typecasting
that would be required otherwise.

Change-Id: I5bc2c3c1dd579f7c6c3d3354c0691e4ba3c778e1
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34706
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>

src/soc/intel/braswell/cpu.c

diff --git a/src/soc/intel/braswell/cpu.c b/src/soc/intel/braswell/cpu.c
index bde4b1c..1cee4b9 100644
--- a/src/soc/intel/braswell/cpu.c
+++ b/src/soc/intel/braswell/cpu.c
@@ -150,7 +150,7 @@
 static void get_smm_info(uintptr_t *perm_smbase, size_t *perm_smsize,
 				size_t *smm_save_state_size)
 {
-	void *smm_base;
+	uintptr_t smm_base;
 	size_t smm_size;
 
 	/* All range registers are aligned to 4KiB */
@@ -158,7 +158,7 @@
 
 	/* Initialize global tracking state. */
 	smm_region(&smm_base, &smm_size);
-	relo_attrs.smbase = (uint32_t)smm_base;
+	relo_attrs.smbase = smm_base;
 	relo_attrs.smrr_base = relo_attrs.smbase | MTRR_TYPE_WRBACK;
 	relo_attrs.smrr_mask = ~(smm_size - 1) & rmask;
 	relo_attrs.smrr_mask |= MTRR_PHYS_MASK_VALID;

src/soc/intel/braswell/memmap.c

diff --git a/src/soc/intel/braswell/memmap.c b/src/soc/intel/braswell/memmap.c
index 69bbe58..01594ea 100644
--- a/src/soc/intel/braswell/memmap.c
+++ b/src/soc/intel/braswell/memmap.c
@@ -28,9 +28,9 @@
 	return smm_size;
 }
 
-void smm_region(void **start, size_t *size)
+void smm_region(uintptr_t *start, size_t *size)
 {
-	*start = (void *)((iosf_bunit_read(BUNIT_SMRRL) & 0xFFFF) << 20);
+	*start = (iosf_bunit_read(BUNIT_SMRRL) & 0xFFFF) << 20;
 	*size = smm_region_size();
 }
 
@@ -43,15 +43,13 @@
  *     |         (TSEG)          |
  *     +-------------------------+ BUNIT_SMRRL
  */
-int smm_subregion(int sub, void **start, size_t *size)
+int smm_subregion(int sub, uintptr_t *start, size_t *size)
 {
 	uintptr_t sub_base;
-	void *sub_ptr;
 	size_t sub_size;
 	const size_t cache_size = CONFIG_SMM_RESERVED_SIZE;
 
-	smm_region(&sub_ptr, &sub_size);
-	sub_base = (uintptr_t)sub_ptr;
+	smm_region(&sub_base, &sub_size);
 
 	switch (sub) {
 	case SMM_SUBREGION_HANDLER:
@@ -67,15 +65,14 @@
 		return -1;
 	}
 
-	*start = (void *)sub_base;
+	*start = sub_base;
 	*size = sub_size;
-
 	return 0;
 }
 
 void *cbmem_top(void)
 {
-	char *smm_base;
+	uintptr_t smm_base;
 	size_t smm_size;
 
 	/*
@@ -106,6 +103,6 @@
 	 *     +-------------------------+
 	*/
 
-	smm_region((void **)&smm_base, &smm_size);
+	smm_region(&smm_base, &smm_size);
 	return (void *)smm_base;
 }

src/soc/intel/braswell/northcluster.c

diff --git a/src/soc/intel/braswell/northcluster.c b/src/soc/intel/braswell/northcluster.c
index e37e0d6..ff58ebf 100644
--- a/src/soc/intel/braswell/northcluster.c
+++ b/src/soc/intel/braswell/northcluster.c
@@ -87,7 +87,7 @@
 	unsigned long mmconf;
 	unsigned long bmbound_k;
 	unsigned long bmbound_hi;
-	void *smm_base;
+	uintptr_t smm_base;
 	size_t smm_size;
 	unsigned long tseg_base_k;
 	unsigned long tseg_top_k;
@@ -102,7 +102,7 @@
 
 	/* Determine TSEG data */
 	smm_region(&smm_base, &smm_size);
-	tseg_base_k = RES_IN_KIB((unsigned long) smm_base);
+	tseg_base_k = RES_IN_KIB(smm_base);
 	tseg_top_k = tseg_base_k + RES_IN_KIB(smm_size);
 
 	/* Determine the base of the FSP reserved memory */