tree ca1a9a85e235cc581d5871d91cb92b20bb6cfd56
parent ede5564b3e3ee082c93f915a902d98d064a11950
author Chia-Ling Hou <chia-ling.hou@intel.com> 1684143117 +0800
committer Lean Sheng Tan <sheng.tan@9elements.com> 1684491396 +0000

soc/intel/jasperlake: Add PsysPmax config

Enable PSYS capability. PSYS is required to safeguard the system
stability if no charger IC.

BUG=b:281479111
TEST=emerge-dedede coreboot chromeos-bootimage & ensure the value is
passed to FSP by enabling FSP log & Boot into the OS

Change-Id: Ibe54acaf80700252558b82f194b9536b6117b84e
Signed-off-by: Chia-Ling Hou <chia-ling.hou@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75196
Reviewed-by: Reka Norman <rekanorman@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>