commit 13f66507afdcde5170546e5ca1ce5a945895eb10
author Kyösti Mälkki <kyosti.malkki@gmail.com> Sun Mar 03 08:01:05 2019 +0200
committer Kyösti Mälkki <kyosti.malkki@gmail.com> Mon Mar 04 15:57:39 2019 +0000
tree 40c1d05a05b05b596f290c186aa59a8b4d9768ab
parent 065857ee7fd61b05025d7a803e82f2b9b53cbc9a

device/mmio.h: Add include file for MMIO ops

MMIO operations are arch-agnostic so the include
path should not be arch/.

Change-Id: I0fd70f5aeca02e98e96b980c3aca0819f5c44b98
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/31691
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/southbridge/intel/bd82x6x/azalia.c

diff --git a/src/southbridge/intel/bd82x6x/azalia.c b/src/southbridge/intel/bd82x6x/azalia.c
index e960b06..0cc9efa 100644
--- a/src/southbridge/intel/bd82x6x/azalia.c
+++ b/src/southbridge/intel/bd82x6x/azalia.c
@@ -20,7 +20,7 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
-#include <arch/io.h>
+#include <device/mmio.h>
 #include <delay.h>
 #include <device/azalia_device.h>
 #include "pch.h"

src/southbridge/intel/bd82x6x/early_pch.c

diff --git a/src/southbridge/intel/bd82x6x/early_pch.c b/src/southbridge/intel/bd82x6x/early_pch.c
index 2e1c5fc..b5fbfbb 100644
--- a/src/southbridge/intel/bd82x6x/early_pch.c
+++ b/src/southbridge/intel/bd82x6x/early_pch.c
@@ -14,7 +14,7 @@
  */
 
 #include <string.h>
-#include <arch/io.h>
+#include <device/mmio.h>
 #include <device/pci_ops.h>
 #include <arch/cbfs.h>
 #include <ip_checksum.h>

src/southbridge/intel/bd82x6x/early_thermal.c

diff --git a/src/southbridge/intel/bd82x6x/early_thermal.c b/src/southbridge/intel/bd82x6x/early_thermal.c
index f29ba5d..63da2d6 100644
--- a/src/southbridge/intel/bd82x6x/early_thermal.c
+++ b/src/southbridge/intel/bd82x6x/early_thermal.c
@@ -14,7 +14,7 @@
  * GNU General Public License for more details.
  */
 
-#include <arch/io.h>
+#include <device/mmio.h>
 #include <device/pci_ops.h>
 #include "pch.h"
 #include "cpu/intel/model_206ax/model_206ax.h"

src/southbridge/intel/bd82x6x/early_usb.c

diff --git a/src/southbridge/intel/bd82x6x/early_usb.c b/src/southbridge/intel/bd82x6x/early_usb.c
index a7321c9..17919af 100644
--- a/src/southbridge/intel/bd82x6x/early_usb.c
+++ b/src/southbridge/intel/bd82x6x/early_usb.c
@@ -15,6 +15,7 @@
  */
 
 #include <arch/io.h>
+#include <device/mmio.h>
 #include <device/pci_ops.h>
 #include <device/pci_def.h>
 #include <northbridge/intel/sandybridge/sandybridge.h>

src/southbridge/intel/bd82x6x/me.c

diff --git a/src/southbridge/intel/bd82x6x/me.c b/src/southbridge/intel/bd82x6x/me.c
index f5516e3..58c2478 100644
--- a/src/southbridge/intel/bd82x6x/me.c
+++ b/src/southbridge/intel/bd82x6x/me.c
@@ -23,7 +23,7 @@
  */
 
 #include <arch/acpi.h>
-#include <arch/io.h>
+#include <device/mmio.h>
 #include <device/pci_ops.h>
 #include <console/console.h>
 #include <device/pci_ids.h>

src/southbridge/intel/bd82x6x/me_8.x.c

diff --git a/src/southbridge/intel/bd82x6x/me_8.x.c b/src/southbridge/intel/bd82x6x/me_8.x.c
index 951c8ab..bdd57cd 100644
--- a/src/southbridge/intel/bd82x6x/me_8.x.c
+++ b/src/southbridge/intel/bd82x6x/me_8.x.c
@@ -23,7 +23,7 @@
  */
 
 #include <arch/acpi.h>
-#include <arch/io.h>
+#include <device/mmio.h>
 #include <device/pci_ops.h>
 #include <console/console.h>
 #include <device/pci_ids.h>

src/southbridge/intel/bd82x6x/sata.c

diff --git a/src/southbridge/intel/bd82x6x/sata.c b/src/southbridge/intel/bd82x6x/sata.c
index 02d478c..3ee0a59 100644
--- a/src/southbridge/intel/bd82x6x/sata.c
+++ b/src/southbridge/intel/bd82x6x/sata.c
@@ -14,7 +14,7 @@
  * GNU General Public License for more details.
  */
 
-#include <arch/io.h>
+#include <device/mmio.h>
 #include <device/pci_ops.h>
 #include <console/console.h>
 #include <device/device.h>

src/southbridge/intel/bd82x6x/usb_ehci.c

diff --git a/src/southbridge/intel/bd82x6x/usb_ehci.c b/src/southbridge/intel/bd82x6x/usb_ehci.c
index b4060e5..e98b8be 100644
--- a/src/southbridge/intel/bd82x6x/usb_ehci.c
+++ b/src/southbridge/intel/bd82x6x/usb_ehci.c
@@ -20,7 +20,7 @@
 #include <device/pci_ids.h>
 #include "pch.h"
 #include <device/pci_ehci.h>
-#include <arch/io.h>
+#include <device/mmio.h>
 #include <device/pci_ops.h>
 
 static void usb_ehci_init(struct device *dev)