commit | 13f66507afdcde5170546e5ca1ce5a945895eb10 | [log] [tgz] |
---|---|---|
author | Kyösti Mälkki <kyosti.malkki@gmail.com> | Sun Mar 03 08:01:05 2019 +0200 |
committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | Mon Mar 04 15:57:39 2019 +0000 |
tree | 40c1d05a05b05b596f290c186aa59a8b4d9768ab | |
parent | 065857ee7fd61b05025d7a803e82f2b9b53cbc9a [diff] |
device/mmio.h: Add include file for MMIO ops MMIO operations are arch-agnostic so the include path should not be arch/. Change-Id: I0fd70f5aeca02e98e96b980c3aca0819f5c44b98 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/31691 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/northbridge/intel/gm45/gma.c b/src/northbridge/intel/gm45/gma.c index 347a5ae..4a5ebbd 100644 --- a/src/northbridge/intel/gm45/gma.c +++ b/src/northbridge/intel/gm45/gma.c
@@ -14,7 +14,7 @@ * GNU General Public License for more details. */ -#include <arch/io.h> +#include <device/mmio.h> #include <console/console.h> #include <delay.h> #include <device/device.h>
diff --git a/src/northbridge/intel/gm45/raminit.c b/src/northbridge/intel/gm45/raminit.c index d4209dc..2826d74 100644 --- a/src/northbridge/intel/gm45/raminit.c +++ b/src/northbridge/intel/gm45/raminit.c
@@ -17,7 +17,7 @@ #include <stdint.h> #include <stdlib.h> #include <arch/cpu.h> -#include <arch/io.h> +#include <device/mmio.h> #include <device/pci_ops.h> #include <device/pci_def.h> #include <device/device.h>
diff --git a/src/northbridge/intel/gm45/raminit_read_write_training.c b/src/northbridge/intel/gm45/raminit_read_write_training.c index 49e565f..3f5dbca 100644 --- a/src/northbridge/intel/gm45/raminit_read_write_training.c +++ b/src/northbridge/intel/gm45/raminit_read_write_training.c
@@ -15,7 +15,7 @@ */ #include <stdint.h> -#include <arch/io.h> +#include <device/mmio.h> #include <pc80/mc146818rtc.h> #include <console/console.h> #include "gm45.h"
diff --git a/src/northbridge/intel/gm45/raminit_receive_enable_calibration.c b/src/northbridge/intel/gm45/raminit_receive_enable_calibration.c index 7d57a4e..7c7f56d 100644 --- a/src/northbridge/intel/gm45/raminit_receive_enable_calibration.c +++ b/src/northbridge/intel/gm45/raminit_receive_enable_calibration.c
@@ -15,7 +15,7 @@ */ #include <stdint.h> -#include <arch/io.h> +#include <device/mmio.h> #include <console/console.h> #include "gm45.h"