northbridge/intel: Add required space before opening parenthesis '('
Change-Id: I53208ce5db06d2c65f954e6d59222924ab87722e
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16304
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
diff --git a/src/northbridge/intel/i945/debug.c b/src/northbridge/intel/i945/debug.c
index d26e84e..5b6c87a 100644
--- a/src/northbridge/intel/i945/debug.c
+++ b/src/northbridge/intel/i945/debug.c
@@ -24,7 +24,7 @@
void print_pci_devices(void)
{
device_t dev;
- for(dev = PCI_DEV(0, 0, 0);
+ for (dev = PCI_DEV(0, 0, 0);
dev <= PCI_DEV(0, 0x1f, 0x7);
dev += PCI_DEV(0,0,1)) {
uint32_t id;
@@ -46,7 +46,7 @@
printk(BIOS_DEBUG, "PCI: %02x:%02x.%02x\n", (dev >> 20) & 0xff, (dev >> 15) & 0x1f, (dev >> 12) & 7);
- for(i = 0; i <= 255; i++) {
+ for (i = 0; i <= 255; i++) {
unsigned char val;
if ((i & 0x0f) == 0) {
printk(BIOS_DEBUG, "%02x:", i);
@@ -62,7 +62,7 @@
void dump_pci_devices(void)
{
device_t dev;
- for(dev = PCI_DEV(0, 0, 0);
+ for (dev = PCI_DEV(0, 0, 0);
dev <= PCI_DEV(0, 0x1f, 0x7);
dev += PCI_DEV(0,0,1)) {
uint32_t id;
@@ -80,12 +80,12 @@
{
unsigned device;
device = DIMM0;
- while(device <= DIMM3) {
+ while (device <= DIMM3) {
int status = 0;
int i;
printk(BIOS_DEBUG, "\ndimm %02x", device);
- for(i = 0; (i < 256) ; i++) {
+ for (i = 0; (i < 256) ; i++) {
if ((i % 16) == 0) {
printk(BIOS_DEBUG, "\n%02x: ", i);
}
@@ -105,8 +105,8 @@
{
unsigned i;
printk(BIOS_DEBUG, "dump_mem:");
- for(i=start;i<end;i++) {
- if((i & 0xf)==0) {
+ for (i=start;i<end;i++) {
+ if ((i & 0xf)==0) {
printk(BIOS_DEBUG, "\n%08x:", i);
}
printk(BIOS_DEBUG, " %02x", (unsigned char)*((unsigned char *)i));
diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c
index 27acef3..8c674e9 100644
--- a/src/northbridge/intel/i945/raminit.c
+++ b/src/northbridge/intel/i945/raminit.c
@@ -469,7 +469,7 @@
SPD_ACCEPTABLE_CAS_LATENCIES);
}
- if(!cas_mask) {
+ if (!cas_mask) {
die("No DDR-II modules with accepted CAS latencies found.\n");
}
@@ -632,7 +632,7 @@
tRAS_cycles++;
}
}
- if(tRAS_cycles > 0x18) {
+ if (tRAS_cycles > 0x18) {
die("DDR-II Module does not support this frequency (tRAS error)\n");
}
@@ -673,7 +673,7 @@
}
}
- if(tRP_cycles > 6) {
+ if (tRP_cycles > 6) {
die("DDR-II Module does not support this frequency (tRP error)\n");
}
@@ -713,7 +713,7 @@
tRCD_cycles++;
}
}
- if(tRCD_cycles > 6) {
+ if (tRCD_cycles > 6) {
die("DDR-II Module does not support this frequency (tRCD error)\n");
}
@@ -753,7 +753,7 @@
tWR_cycles++;
}
}
- if(tWR_cycles > 5) {
+ if (tWR_cycles > 5) {
die("DDR-II Module does not support this frequency (tWR error)\n");
}
@@ -1466,7 +1466,7 @@
{
int i;
- for(i = 0; i < 2 * DIMM_SOCKETS; i++) {
+ for (i = 0; i < 2 * DIMM_SOCKETS; i++) {
struct dimm_size sz;
sysinfo->banksize[i * 2] = 0;
@@ -1508,7 +1508,7 @@
printk(BIOS_DEBUG, "Setting RAM size...\n");
cum0 = 0;
- for(i = 0; i < 2 * DIMM_SOCKETS; i++) {
+ for (i = 0; i < 2 * DIMM_SOCKETS; i++) {
cum0 += sysinfo->banksize[i];
MCHBAR8(C0DRB0+i) = cum0;
}
@@ -1527,7 +1527,7 @@
cum1 = 0;
#endif
- for(i = 0; i < 2 * DIMM_SOCKETS; i++) {
+ for (i = 0; i < 2 * DIMM_SOCKETS; i++) {
cum1 += sysinfo->banksize[i + 4];
MCHBAR8(C1DRB0+i) = cum1;
}
@@ -1562,7 +1562,7 @@
u16 dra0=0, dra1=0, dra = 0;
printk(BIOS_DEBUG, "Setting row attributes...\n");
- for(i=0; i < 2 * DIMM_SOCKETS; i++) {
+ for (i=0; i < 2 * DIMM_SOCKETS; i++) {
u16 device;
u8 columnsrows;
@@ -1908,7 +1908,7 @@
reg32 = MCHBAR32(DCC);
reg32 &= ~(7 << 0);
- if(sysinfo->interleaved) {
+ if (sysinfo->interleaved) {
/* Dual Channel Interleaved */
printk(BIOS_DEBUG, "Dual Channel Interleaved.\n");
reg32 |= (1 << 1);
diff --git a/src/northbridge/intel/i945/rcven.c b/src/northbridge/intel/i945/rcven.c
index afe6199..f4d9315 100644
--- a/src/northbridge/intel/i945/rcven.c
+++ b/src/northbridge/intel/i945/rcven.c
@@ -273,7 +273,7 @@
/**
* Here we use a trick. The RCVEN channel 0 registers are all at an
* offset of 0x80 to the channel 0 registers. We don't want to waste
- * a lot of if()s so let's just pass 0 or 0x80 for the channel offset.
+ * a lot of if ()s so let's just pass 0 or 0x80 for the channel offset.
*/
static int receive_enable_autoconfig(int channel_offset,