vboot: use vboot2 API to set initial secdatak value

Previously, the initial value for secdatak was embedded
in secdata_tpm.c as a uint8_t array.  Switch to using
vb2api_secdatak_create instead, and write the value in
ctx->secdatak.

Remove an unnecessary call to vb2api_secdata_create in
_factory_initialize_tpm.

BUG=b:124141368, chromium:972956
TEST=make clean && make test-abuild
BRANCH=none

TEST=Check that size and value of initial secdatak
     has not changed.  Apply the patch below and
     check for this output:
_factory_initialize_tpm():266: _factory_initialize_tpm: secdatak sizes are identical? 1
_factory_initialize_tpm():269: _factory_initialize_tpm: secdatak values are identical? 1

diff --git a/src/security/vboot/secdata_tpm.c b/src/security/vboot/secdata_tpm.c
index ff62185107..c1818b482f 100644
--- a/src/security/vboot/secdata_tpm.c
+++ b/src/security/vboot/secdata_tpm.c
@@ -148,6 +148,18 @@ static uint32_t write_secdata(uint32_t index,
        return TPM_E_CORRUPTED_STATE;
 }

+/*
+ * This is derived from rollback_index.h of vboot_reference. see struct
+ * RollbackSpaceKernel for details.
+ */
+static const uint8_t secdata_kernel[] = {
+       0x02,
+       0x4C, 0x57, 0x52, 0x47,
+       0x00, 0x00, 0x00, 0x00,
+       0x00, 0x00, 0x00,
+       0xE8,
+};
+
 /*
  * This is used to initialize the TPM space for recovery hash after defining
  * it. Since there is no data available to calculate hash at the point where TPM
@@ -250,6 +262,11 @@ static uint32_t _factory_initialize_tpm(struct vb2_context *ctx)
         * indication that TPM factory initialization was successfully
         * completed.
         */
+       VBDEBUG("%s: secdatak sizes are identical? %d\n", __func__,
+               sizeof(secdata_kernel) == sizeof(ctx->secdatak));
+       VBDEBUG("%s: secdatak values are identical? %d\n", __func__,
+               memcmp(secdata_kernel, ctx->secdatak,
+                      sizeof(secdata_kernel)) == 0);
        RETURN_ON_FAILURE(set_kernel_space(ctx->secdatak));

        if (CONFIG(VBOOT_HAS_REC_HASH_SPACE))
@@ -452,7 +469,7 @@ uint32_t antirollback_read_space_firmware(struct vb2_context *ctx)

        /* Read the firmware space. */
        rv = read_space_firmware(ctx);
-       if (rv == TPM_E_BADINDEX) {
+       if (true) {
                /*
                 * This seems the first time we've run. Initialize the TPM.
                 */

Change-Id: I74261453df6cc55ef3f38d8fb922bcc604084c0a
Signed-off-by: Joel Kitching <kitching@google.com>
Cq-Depend: chromium:1652874, chromium:1655049
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33386
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
1 file changed
tree: 2dddef07642e3a01bc6cc3a997f71e9764d0c471
  1. 3rdparty/
  2. configs/
  3. Documentation/
  4. payloads/
  5. src/
  6. util/
  7. .checkpatch.conf
  8. .clang-format
  9. .gitignore
  10. .gitmodules
  11. .gitreview
  12. AUTHORS
  13. COPYING
  14. gnat.adc
  15. MAINTAINERS
  16. Makefile
  17. Makefile.inc
  18. README.md
  19. toolchain.inc
README.md

coreboot README

coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.

With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.

coreboot was formerly known as LinuxBIOS.

Payloads

After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.

See https://www.coreboot.org/Payloads for a list of supported payloads.

Supported Hardware

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

Build Requirements

  • make
  • gcc / g++ Because Linux distribution compilers tend to use lots of patches. coreboot does lots of "unusual" things in its build system, some of which break due to those patches, sometimes by gcc aborting, sometimes - and that's worse - by generating broken object code. Two options: use our toolchain (eg. make crosstools-i386) or enable the ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this case).
  • iasl (for targets with ACPI support)
  • pkg-config
  • libssl-dev (openssl)

Optional:

  • doxygen (for generating/viewing documentation)
  • gdb (for better debugging facilities on some targets)
  • ncurses (for make menuconfig and make nconfig)
  • flex and bison (for regenerating parsers)

Building coreboot

Please consult https://www.coreboot.org/Build_HOWTO for details.

Testing coreboot Without Modifying Your Hardware

If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.

Please see https://www.coreboot.org/QEMU for details.

Website and Mailing List

Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:

https://www.coreboot.org

You can contact us directly on the coreboot mailing list:

https://www.coreboot.org/Mailinglist

Copyright and License

The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.