nb/intel: Fix some spelling mistakes in comments and strings
Change-Id: I4a8297397d878e38516c8df19dd311c7ef19ec06
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/17478
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
diff --git a/src/northbridge/intel/sandybridge/gma.c b/src/northbridge/intel/sandybridge/gma.c
index 1f52511..290d066 100644
--- a/src/northbridge/intel/sandybridge/gma.c
+++ b/src/northbridge/intel/sandybridge/gma.c
@@ -249,7 +249,7 @@
/* some vga option roms are used for several chipsets but they only have one
* PCI ID in their header. If we encounter such an option rom, we need to do
- * the mapping ourselfes
+ * the mapping ourselves
*/
u32 map_oprom_vendev(u32 vendev)
diff --git a/src/northbridge/intel/sandybridge/gma_ivybridge_lvds.c b/src/northbridge/intel/sandybridge/gma_ivybridge_lvds.c
index 489dbc7..bcdeaa0 100644
--- a/src/northbridge/intel/sandybridge/gma_ivybridge_lvds.c
+++ b/src/northbridge/intel/sandybridge/gma_ivybridge_lvds.c
@@ -252,7 +252,7 @@
u32 current_delta;
denom = candn * candp1 * 7;
- /* Doesnt overflow for up to
+ /* Doesn't overflow for up to
5000000 kHz = 5 GHz. */
m = (target_frequency * denom + 60000) / 120000;
diff --git a/src/northbridge/intel/sandybridge/gma_sandybridge_lvds.c b/src/northbridge/intel/sandybridge/gma_sandybridge_lvds.c
index df1e8a8..e39e6bc 100644
--- a/src/northbridge/intel/sandybridge/gma_sandybridge_lvds.c
+++ b/src/northbridge/intel/sandybridge/gma_sandybridge_lvds.c
@@ -237,7 +237,7 @@
u32 current_delta;
denom = candn * candp1 * 7;
- /* Doesnt overflow for up to
+ /* Doesn't overflow for up to
5000000 kHz = 5 GHz. */
m = (target_frequency * denom + 60000) / 120000;
diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c
index f3a1ba5..d06e929 100644
--- a/src/northbridge/intel/sandybridge/raminit.c
+++ b/src/northbridge/intel/sandybridge/raminit.c
@@ -71,7 +71,7 @@
*
* DEFAULT_MCHBAR + 0x4230 + 0x400 * X + 4 * Y: idle register
* Controls the idle time after issuing this DRAM command
- * Bit 16-32: number of clock-cylces to idle
+ * Bit 16-32: number of clock-cycles to idle
*
* DEFAULT_MCHBAR + 0x4284 + 0x400 * channel: execute command queue
* Starts to execute all queued commands
@@ -835,7 +835,7 @@
die ("No lock frequency found");
}
- /* Frequency mulitplier. */
+ /* Frequency multiplier. */
u32 FRQ = get_FRQ(ctrl->tCK);
/* The PLL will never lock if the required frequency is
diff --git a/src/northbridge/intel/sandybridge/romstage.c b/src/northbridge/intel/sandybridge/romstage.c
index a2ca1c1..738e285 100644
--- a/src/northbridge/intel/sandybridge/romstage.c
+++ b/src/northbridge/intel/sandybridge/romstage.c
@@ -72,7 +72,7 @@
/* Initialize superio */
mainboard_config_superio();
- /* USB is inited in MRC if MRC is used. */
+ /* USB is initialized in MRC if MRC is used. */
if (CONFIG_USE_NATIVE_RAMINIT) {
early_usb_init(mainboard_usb_ports);
}