soc/intel/common: Implement ACPI CPPCv3 package to support hybrid core
The patch implements ACPI CPPCv3 package. It implements and updates the
following methods:
generate_cppc_entries(): Updates method to support CPPCv3 package
acpi_get_cpu_nominal_freq(): Calculates CPU's nominal frequency
acpi_get_cpu_nomi_perf(): Calculates nominal performance for big and
small cores.
acpigen_write_CPPC_hybrid_method(): It generates ACPI code to implement
_CPC method.
acpigen_cppc_update_nominal_freq_perf(): It updates CPPC3 package if cpu
supports Nominal Frequency. It generates ACPI code which sets Nominal
Frequency and updates Nominal Performance. It uses below calculation to
update the Nominal Frequency and Nominal Performance:
Nominal Frequency = Max non-turbo ratio * cpu_bus_frequency
Nominal Performance = Max non-turn ratio * cpu scaling factor
CPU scaling factor varies in the hybrid core environment. So, the
generated ACPI code updates Nominal Performance based on the CPU's
scaling factor.
TEST=Verified CPPCv3 package is getting created in the SSDT table.
Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Signed-off-by: ravindr1 <ravindra@intel.com>
Change-Id: Icd5ea9e70bebd1e66d3cea2bcf8a6678e5cc95ca
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59359
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
diff --git a/src/soc/intel/common/block/acpi/acpi.c b/src/soc/intel/common/block/acpi/acpi.c
index b827c58..53fa907 100644
--- a/src/soc/intel/common/block/acpi/acpi.c
+++ b/src/soc/intel/common/block/acpi/acpi.c
@@ -372,6 +372,11 @@
static void generate_cppc_entries(int core_id)
{
+ u32 version = CPPC_VERSION_2;
+
+ if (CONFIG(SOC_INTEL_COMMON_BLOCK_ACPI_CPU_HYBRID))
+ version = CPPC_VERSION_3;
+
if (!(CONFIG(SOC_INTEL_COMMON_BLOCK_ACPI_CPPC) &&
cpuid_eax(6) & CPUID_6_EAX_ISST))
return;
@@ -379,12 +384,15 @@
/* Generate GCPC package in first logical core */
if (core_id == 0) {
struct cppc_config cppc_config;
- cpu_init_cppc_config(&cppc_config, CPPC_VERSION_2);
+ cpu_init_cppc_config(&cppc_config, version);
acpigen_write_CPPC_package(&cppc_config);
}
/* Write _CPC entry for each logical core */
- acpigen_write_CPPC_method();
+ if (CONFIG(SOC_INTEL_COMMON_BLOCK_ACPI_CPU_HYBRID))
+ acpigen_write_CPPC_hybrid_method(core_id);
+ else
+ acpigen_write_CPPC_method();
}
__weak void soc_power_states_generation(int core_id,