diff --git a/src/southbridge/intel/bd82x6x/early_pch.c b/src/southbridge/intel/bd82x6x/early_pch.c
index 4015495..1254a16 100644
--- a/src/southbridge/intel/bd82x6x/early_pch.c
+++ b/src/southbridge/intel/bd82x6x/early_pch.c
@@ -13,7 +13,6 @@
  * GNU General Public License for more details.
  */
 
-#include <console/console.h>
 #include <string.h>
 #include <arch/io.h>
 #include <cbmem.h>
@@ -26,7 +25,7 @@
 
 #include "pch.h"
 /* For DMI bar.  */
-#include "northbridge/intel/sandybridge/sandybridge.h"
+#include <northbridge/intel/sandybridge/sandybridge.h>
 
 #define SOUTHBRIDGE PCI_DEV(0, 0x1f, 0)
 
diff --git a/src/southbridge/intel/bd82x6x/early_rcba.c b/src/southbridge/intel/bd82x6x/early_rcba.c
index 9bd3a26..443b6c2 100644
--- a/src/southbridge/intel/bd82x6x/early_rcba.c
+++ b/src/southbridge/intel/bd82x6x/early_rcba.c
@@ -16,8 +16,8 @@
  */
 
 #include <stdint.h>
+#include <northbridge/intel/sandybridge/sandybridge.h>
 #include "pch.h"
-#include "northbridge/intel/sandybridge/sandybridge.h"
 
 void
 southbridge_configure_default_intmap(void)
diff --git a/src/southbridge/intel/bd82x6x/early_usb.c b/src/southbridge/intel/bd82x6x/early_usb.c
index a036858..8df4a00 100644
--- a/src/southbridge/intel/bd82x6x/early_usb.c
+++ b/src/southbridge/intel/bd82x6x/early_usb.c
@@ -15,10 +15,9 @@
  */
 
 #include <arch/io.h>
-#include <console/console.h>
 #include <device/pci_ids.h>
 #include <device/pci_def.h>
-#include "northbridge/intel/sandybridge/sandybridge.h" /* For DEFAULT_RCBABASE.  */
+#include <northbridge/intel/sandybridge/sandybridge.h> /* For DEFAULT_RCBABASE.  */
 #include "pch.h"
 
 void
diff --git a/src/southbridge/intel/ibexpeak/smihandler.c b/src/southbridge/intel/ibexpeak/smihandler.c
index 380c241..8e2f603 100644
--- a/src/southbridge/intel/ibexpeak/smihandler.c
+++ b/src/southbridge/intel/ibexpeak/smihandler.c
@@ -31,7 +31,7 @@
  *  1. the chipset can do it
  *  2. we don't need to worry about how we leave 0xcf8/0xcfc behind
  */
-#include "northbridge/intel/nehalem/nehalem.h"
+#include <northbridge/intel/nehalem/nehalem.h>
 #include <southbridge/intel/common/gpio.h>
 #include <arch/io.h>