nb/intel/ironlake: Use an enum for `gpu_panel_port_select`
The PRM does not describe the relevant bits, but Linux's i915 driver
handles these bits the same way for both Ironlake and Sandy Bridge.
Change-Id: Ice7412e335752bd7e297ad50f685effcefbd41d2
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45036
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
diff --git a/src/mainboard/lenovo/t410/devicetree.cb b/src/mainboard/lenovo/t410/devicetree.cb
index 2de774d..af770dc 100644
--- a/src/mainboard/lenovo/t410/devicetree.cb
+++ b/src/mainboard/lenovo/t410/devicetree.cb
@@ -8,7 +8,7 @@
register "gpu_dp_d_hotplug" = "0x06"
# Enable Panel as LVDS and configure power delays
- register "gpu_panel_port_select" = "0" # LVDS
+ register "gpu_panel_port_select" = "PANEL_PORT_LVDS"
register "gpu_panel_power_cycle_delay" = "1"
register "gpu_panel_power_up_delay" = "1"
register "gpu_panel_power_down_delay" = "600"
diff --git a/src/mainboard/lenovo/x201/devicetree.cb b/src/mainboard/lenovo/x201/devicetree.cb
index d374cec..6b6543d 100644
--- a/src/mainboard/lenovo/x201/devicetree.cb
+++ b/src/mainboard/lenovo/x201/devicetree.cb
@@ -9,7 +9,7 @@
register "gpu_dp_d_hotplug" = "0x06"
# Enable Panel as LVDS and configure power delays
- register "gpu_panel_port_select" = "0" # LVDS
+ register "gpu_panel_port_select" = "PANEL_PORT_LVDS"
register "gpu_panel_power_cycle_delay" = "3"
register "gpu_panel_power_up_delay" = "250"
register "gpu_panel_power_down_delay" = "250"
diff --git a/src/mainboard/packardbell/ms2290/devicetree.cb b/src/mainboard/packardbell/ms2290/devicetree.cb
index 50e648f..b57b3fe 100644
--- a/src/mainboard/packardbell/ms2290/devicetree.cb
+++ b/src/mainboard/packardbell/ms2290/devicetree.cb
@@ -9,7 +9,7 @@
register "gpu_dp_d_hotplug" = "0x04"
# Enable Panel as LVDS and configure power delays
- register "gpu_panel_port_select" = "0" # LVDS
+ register "gpu_panel_port_select" = "PANEL_PORT_LVDS"
register "gpu_panel_power_cycle_delay" = "6"
register "gpu_panel_power_up_delay" = "300"
register "gpu_panel_power_down_delay" = "300"
diff --git a/src/northbridge/intel/ironlake/chip.h b/src/northbridge/intel/ironlake/chip.h
index c437b72..b2976bc 100644
--- a/src/northbridge/intel/ironlake/chip.h
+++ b/src/northbridge/intel/ironlake/chip.h
@@ -17,7 +17,13 @@
u8 gpu_dp_c_hotplug; /* Digital Port C Hotplug Config */
u8 gpu_dp_d_hotplug; /* Digital Port D Hotplug Config */
- u8 gpu_panel_port_select; /* 0=LVDS 1=DP_B 2=DP_C 3=DP_D */
+ enum {
+ PANEL_PORT_LVDS = 0,
+ PANEL_PORT_DP_A = 1, /* Also known as eDP */
+ PANEL_PORT_DP_C = 2,
+ PANEL_PORT_DP_D = 3,
+ } gpu_panel_port_select;
+
u8 gpu_panel_power_cycle_delay; /* T4 time sequence */
u16 gpu_panel_power_up_delay; /* T1+T2 time sequence */
u16 gpu_panel_power_down_delay; /* T3 time sequence */