soc/intel/ehl: Fix logical bug for PseTsnGbePhyInterfaceType
By right if PseTsnGbeSgmiiEnable is disable,
PseTsnGbePhyInterfaceType should use RGMII setting.
Signed-off-by: Lean Sheng Tan <sheng.tan@9elements.com>
Change-Id: If593a5534716a9e93f99cb155fb5e86e12b1df17
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64477
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>
diff --git a/src/soc/intel/elkhartlake/fsp_params.c b/src/soc/intel/elkhartlake/fsp_params.c
index 2100cc4..aacb1e6 100644
--- a/src/soc/intel/elkhartlake/fsp_params.c
+++ b/src/soc/intel/elkhartlake/fsp_params.c
@@ -134,7 +134,7 @@
params->PseTsnGbeMultiVcEnable[i] = config->PseTsnGbeMultiVcEnable[i];
params->PseTsnGbeSgmiiEnable[i] = config->PseTsnGbeSgmiiEnable[i];
params->PseTsnGbePhyInterfaceType[i] =
- !!config->PseTsnGbeSgmiiEnable[i] ?
+ !config->PseTsnGbeSgmiiEnable[i] ?
RGMII : config->PseTsnGbePhyType[i];
params->PseTsnGbeLinkSpeed[i] =
(params->PseTsnGbePhyInterfaceType[i] < SGMII_plus) ?