makefile: Add $(objutil)/kconfig/conf as make dependency
This patch fixes the build failure with 'make -j' where the build
fails at "$(MAKE)... savedefconfig" as that rule doesn't have the
dependency on kconfig/conf.
Normally make takes care of all dependencies, so parallel builds
work well. However if you have recursive make calls, i.e. make
calling make like in these recipes, there is no single make with a
global view of the dependencies anymore, and then multiple "makes"
can try to build the same file concurrently. Adding that explicit
dependency on build/util/kconfig/conf makes sure the recursive make
is only called later when the top-level make already finished
building build/util/kconfig/conf.
Signed-off-by: Lean Sheng Tan <sheng.tan@9elements.com>
Change-Id: Id44ab44618b0ddfb3c2472c469499429118bf76d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72070
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Patrick Georgi <patrick@coreboot.org>
diff --git a/Makefile.inc b/Makefile.inc
index 2b5d742..f1f4646 100644
--- a/Makefile.inc
+++ b/Makefile.inc
@@ -310,7 +310,7 @@
# arg1: input
# arg2: output
define cbfs-files-processor-config
- $(eval $(2): $(1) $(obj)/build.h; \
+ $(eval $(2): $(1) $(obj)/build.h $(objutil)/kconfig/conf; \
+printf " CREATE $(2) (from $(1))\n"; \
printf "# This image was built using coreboot " > $(2).tmp && \
grep "\<COREBOOT_VERSION\>" $(obj)/build.h |cut -d\" -f2 >> $(2).tmp && \