This is kind of a pre CAR patch to properly allocate "shared" graphics memory
area.
CONFIG_GFXUMA is used in src/cpu/x86/mtrr/mtrr.c which is called by the cpu.
Attached is a revised patch which works well.
Signed-off-by: Joseph Smith <joe@settoplinux.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
See boot snips below:
Root Device assign_resources, bus 0 link: 0
8MB IGD UMA
Available memory: 581632KB
PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0
----------------------------
Adding high table area
Adding UMA memory area
coreboot memory table:
0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1. 0000000000001000-000000000009ffff: RAM
2. 0000000000100000-00000000237effff: RAM
3. 00000000237f0000-00000000237fffff: CONFIGURATION TABLES
4. 0000000023800000-0000000023ffffff: RESERVED
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5243 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
diff --git a/src/mainboard/thomson/ip1000/mainboard.c b/src/mainboard/thomson/ip1000/mainboard.c
index daa6b7e..ae951d3 100644
--- a/src/mainboard/thomson/ip1000/mainboard.c
+++ b/src/mainboard/thomson/ip1000/mainboard.c
@@ -1,7 +1,7 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2008 Joseph Smith <joe@settoplinux.org>
+ * Copyright (C) 2008-2010 Joseph Smith <joe@settoplinux.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -19,8 +19,15 @@
*/
#include <device/device.h>
+#include <boot/tables.h>
+#include <arch/coreboot_tables.h>
#include "chip.h"
+int add_mainboard_resources(struct lb_memory *mem)
+{
+ return add_northbridge_resources(mem);
+}
+
static void mainboard_init(device_t dev)
{
// TODO Switch parport LEDs again