arch/x86/ioapic: use uintptr_t for IOAPIC base address
Use uintptr_t for the IOAPIC base parameter of the various IOAPIC-
related functions to avoid needing type casts in the callers. This also
allows dropping the VIO_APIC_VADDR define and consistently use the
IO_APIC_ADDR define instead.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I912943e923ff092708e90138caa5e1daf269a69f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80358
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
diff --git a/src/soc/amd/common/block/acpi/ivrs.c b/src/soc/amd/common/block/acpi/ivrs.c
index bd52d7c..74c5c39 100644
--- a/src/soc/amd/common/block/acpi/ivrs.c
+++ b/src/soc/amd/common/block/acpi/ivrs.c
@@ -16,7 +16,7 @@
#include <soc/iomap.h>
#include <soc/pci_devs.h>
-static unsigned long acpi_fill_ivrs_ioapic(unsigned long current, void *ioapic_base,
+static unsigned long acpi_fill_ivrs_ioapic(unsigned long current, uintptr_t ioapic_base,
uint16_t src_devid, uint8_t dte_setting)
{
ivrs_ivhd_special_t *ivhd_ioapic = (ivrs_ivhd_special_t *)current;
@@ -182,7 +182,7 @@
res = probe_resource(dev, IOMMU_IOAPIC_IDX);
if (res) {
/* Describe IOAPIC associated with the IOMMU */
- current = acpi_fill_ivrs_ioapic(current, (u8 *)(uintptr_t)res->base,
+ current = acpi_fill_ivrs_ioapic(current, (uintptr_t)res->base,
PCI_DEVFN(0, 1) | (dev->downstream->secondary << 8), 0);
}
@@ -191,7 +191,7 @@
/* Describe HPET */
current = ivhd_describe_hpet(current, 0x00, SMBUS_DEVFN);
/* Describe FCH IOAPICs */
- current = acpi_fill_ivrs_ioapic(current, VIO_APIC_VADDR,
+ current = acpi_fill_ivrs_ioapic(current, IO_APIC_ADDR,
SMBUS_DEVFN, dte_setting);
}
diff --git a/src/soc/amd/common/block/lpc/lpc.c b/src/soc/amd/common/block/lpc/lpc.c
index a90fc3e..2392d5f 100644
--- a/src/soc/amd/common/block/lpc/lpc.c
+++ b/src/soc/amd/common/block/lpc/lpc.c
@@ -45,7 +45,7 @@
static void fch_ioapic_init(void)
{
fch_enable_ioapic_decode();
- register_new_ioapic_gsi0(VIO_APIC_VADDR);
+ register_new_ioapic_gsi0(IO_APIC_ADDR);
}
static void lpc_init(struct device *dev)
diff --git a/src/soc/amd/common/block/root_complex/ioapic.c b/src/soc/amd/common/block/root_complex/ioapic.c
index cdeb532..e183428 100644
--- a/src/soc/amd/common/block/root_complex/ioapic.c
+++ b/src/soc/amd/common/block/root_complex/ioapic.c
@@ -13,5 +13,5 @@
if (!res)
return;
- register_new_ioapic((void *)(uintptr_t)res->base);
+ register_new_ioapic((uintptr_t)res->base);
}
diff --git a/src/soc/amd/stoneyridge/northbridge.c b/src/soc/amd/stoneyridge/northbridge.c
index a92c3b5..b51601b 100644
--- a/src/soc/amd/stoneyridge/northbridge.c
+++ b/src/soc/amd/stoneyridge/northbridge.c
@@ -73,7 +73,7 @@
static void northbridge_init(struct device *dev)
{
- register_new_ioapic((u8 *)IO_APIC2_ADDR);
+ register_new_ioapic(IO_APIC2_ADDR);
}
/* Used by \_SB.PCI0._CRS */