| commit | 0ce41f1a116a816e774ebbd1130d27d7ee70e7e9 | [log] [tgz] |
|---|---|---|
| author | Elyes HAOUAS <ehaouas@noos.fr> | Tue Nov 13 10:03:31 2018 +0100 |
| committer | Patrick Georgi <pgeorgi@google.com> | Mon Nov 19 08:17:06 2018 +0000 |
| tree | 983a793e01bbf09ed1e9c74534d4b78f9d3f2866 | |
| parent | 16f9bf83e00c786275d3fcc9d512d145ef6c93c9 [diff] [blame] |
src: Add required space after "switch" Change-Id: I85cf93e30606bc7838852bd300a369e79370629a Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/29623 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
diff --git a/src/northbridge/intel/x4x/raminit_ddr23.c b/src/northbridge/intel/x4x/raminit_ddr23.c index 4e5c0ce..32fa0d9 100644 --- a/src/northbridge/intel/x4x/raminit_ddr23.c +++ b/src/northbridge/intel/x4x/raminit_ddr23.c
@@ -820,7 +820,7 @@ FOR_EACH_POPULATED_CHANNEL(s->dimms, i) { const struct dll_setting *setting; - switch(s->selected_timings.mem_clk) { + switch (s->selected_timings.mem_clk) { default: /* Should not happen */ case MEM_CLOCK_667MHz: setting = default_ddr2_667_ctrl;