tree 5664b5a7f0b3712ba843892cd4f05e58f1ab48f8
parent dea42e011a126c4fdc9ab62f6d6c449df4740f82
author Lean Sheng Tan <lean.sheng.tan@intel.com> 1623220875 -0700
committer Patrick Georgi <pgeorgi@google.com> 1623396737 +0000

soc/intel/elkhartlake: Update FSP-S FuSa related settings

Further add initial Silicon UPD settings for FuSa
(Functional Safety). Disable all by default, due to FSP binary
enable all by default.

Signed-off-by: Lean Sheng Tan <lean.sheng.tan@intel.com>
Change-Id: I88264ba3e3f9f54ad949c55b230082d1fa289fa4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55342
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>