arch/x86/Kconfig: Drop obsolete fixed ramstage symbols
On x86 ramstage is always relocated at runtime in cbmem so there is no
need to have this configurable in Kconfig.
Change-Id: I01b2335d0b82bea8f885ee5ca9814351bbf2aa3c
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63215
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig
index 4052b2e..e9fce50 100644
--- a/src/arch/x86/Kconfig
+++ b/src/arch/x86/Kconfig
@@ -118,22 +118,6 @@
default n
depends on ARCH_X86
-# Set the rambase for systems that still need it, only 5 chipsets as of
-# Sep 2018. This value was 0x100000, chosen to match the entry point
-# of Linux 2.2 in 1999. The new value, 14 MiB, makes a lot more sense
-# for as long as we need it; with luck, that won't be much longer.
-# In the long term, both RAMBASE and RAMTOP should be removed.
-# This value leaves more than 1 MiB which is required for fam10
-# and broadwell_de.
-config RAMBASE
- hex
- default 0xe00000
-
-config RAMTOP
- hex
- default 0x1000000
- depends on ARCH_X86
-
# Traditionally BIOS region on SPI flash boot media was memory mapped right below
# 4G and it was the last region in the IFD. This way translation between CPU
# address space to flash address was trivial. However some IFDs on newer SoCs
diff --git a/src/arch/x86/include/arch/memlayout.h b/src/arch/x86/include/arch/memlayout.h
index aea5a7d..4f5d21a 100644
--- a/src/arch/x86/include/arch/memlayout.h
+++ b/src/arch/x86/include/arch/memlayout.h
@@ -3,10 +3,6 @@
#ifndef __ARCH_MEMLAYOUT_H
#define __ARCH_MEMLAYOUT_H
-#if (CONFIG_RAMTOP == 0)
-# error "CONFIG_RAMTOP not configured"
-#endif
-
/* Intel386 psABI requires a 16 byte aligned stack. */
#define ARCH_STACK_ALIGN_SIZE 16
diff --git a/src/arch/x86/memlayout.ld b/src/arch/x86/memlayout.ld
index a0b0f53..bbd5450 100644
--- a/src/arch/x86/memlayout.ld
+++ b/src/arch/x86/memlayout.ld
@@ -13,7 +13,8 @@
* conditionalize with macros.
*/
#if ENV_RAMSTAGE
- RAMSTAGE(CONFIG_RAMBASE, 8M)
+ /* Relocated at runtime in cbmem so the address does not matter. */
+ RAMSTAGE(64M, 8M)
#elif ENV_ROMSTAGE
/* The 1M size is not allocated. It's just for basic size checking.
diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig
index 48944c8..8522d3f 100644
--- a/src/soc/amd/cezanne/Kconfig
+++ b/src/soc/amd/cezanne/Kconfig
@@ -217,10 +217,6 @@
hex
default 0x40000 if CBFS_PRELOAD
-config RAMBASE
- hex
- default 0x10000000
-
config RO_REGION_ONLY
string
depends on VBOOT_SLOTS_RW_AB || VBOOT_SLOTS_RW_A
diff --git a/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld b/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld
index f17043b..4c2a740 100644
--- a/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld
+++ b/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld
@@ -111,7 +111,8 @@
EARLY_RESERVED_DRAM_END(.)
- RAMSTAGE(CONFIG_RAMBASE, 8M)
+ /* Relocated at runtime in cbmem so the address does not matter. */
+ RAMSTAGE(64M, 8M)
}
#if ENV_BOOTBLOCK
diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig
index 84af18c..b005f9b 100644
--- a/src/soc/amd/picasso/Kconfig
+++ b/src/soc/amd/picasso/Kconfig
@@ -207,10 +207,6 @@
Sets the size of DRAM allocation for verstage in linker script if
running as a separate stage on x86.
-config RAMBASE
- hex
- default 0x10000000
-
config ECAM_MMCONF_BASE_ADDRESS
default 0xF8000000
diff --git a/src/soc/amd/sabrina/Kconfig b/src/soc/amd/sabrina/Kconfig
index 3df7a4b..66719a6 100644
--- a/src/soc/amd/sabrina/Kconfig
+++ b/src/soc/amd/sabrina/Kconfig
@@ -222,10 +222,6 @@
hex
default 0x40000 if CBFS_PRELOAD
-config RAMBASE
- hex
- default 0x10000000
-
config RO_REGION_ONLY
string
depends on VBOOT_SLOTS_RW_AB || VBOOT_SLOTS_RW_A