commit 0c32c9795b1cb2270f677e55ba38e7d293e723ee
author Stefan Reinauer <reinauer@chromium.org> Tue Jul 10 13:26:59 2012 -0700
committer Ronald G. Minnich <rminnich@gmail.com> Wed Jul 25 00:35:10 2012 +0200
tree 9beb3c53ced0ac3aa174cbc4d8332f49eafe3e6f
parent 9c4c6ab0c895a35d6bad33ecb2cb7f40eea98001

bd82x6x: Drop unneeded pci_dev_t

This was introduced when porting the SPI driver over from u-boot but it
is not needed. Hence drop the extra typedef and use device_t instead.

Change-Id: I3ab797a8e482d1c9aa1d004e488e99aeaffcdd8b
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1331
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Tested-by: build bot (Jenkins)

src/southbridge/intel/bd82x6x/spi.c

diff --git a/src/southbridge/intel/bd82x6x/spi.c b/src/southbridge/intel/bd82x6x/spi.c
index 6b39571..5903fd8 100644
--- a/src/southbridge/intel/bd82x6x/spi.c
+++ b/src/southbridge/intel/bd82x6x/spi.c
@@ -36,7 +36,6 @@
 #ifdef __SMM__
 #include <arch/romcc_io.h>
 #include <northbridge/intel/sandybridge/pcie_config.c>
-typedef device_t pci_dev_t;
 #define pci_read_config_byte(dev, reg, targ)\
 	*(targ) = pcie_read_config8(dev, reg)
 #define pci_read_config_word(dev, reg, targ)\
@@ -52,7 +51,6 @@
 #else /* !__SMM__ */
 #include <device/device.h>
 #include <device/pci.h>
-typedef device_t pci_dev_t;
 #define pci_read_config_byte(dev, reg, targ)\
 	*(targ) = pci_read_config8(dev, reg)
 #define pci_read_config_word(dev, reg, targ)\
@@ -331,7 +329,7 @@
 	uint8_t *rcrb; /* Root Complex Register Block */
 	uint32_t rcba; /* Root Complex Base Address */
 	uint8_t bios_cntl;
-	pci_dev_t dev;
+	device_t dev;
 	uint32_t ids;
 	uint16_t vendor_id, device_id;