sb/intel/lynxpoint: Replace HPET_ADDR
The `HPET_ADDRESS` Kconfig option has the same value. Use it instead.
Change-Id: I268e949d4396aa20e38f719b36cc4e6226efe082
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49743
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
diff --git a/src/northbridge/intel/haswell/romstage.c b/src/northbridge/intel/haswell/romstage.c
index fa3c523..7b4182e 100644
--- a/src/northbridge/intel/haswell/romstage.c
+++ b/src/northbridge/intel/haswell/romstage.c
@@ -56,7 +56,7 @@
.epbar = CONFIG_FIXED_EPBAR_MMIO_BASE,
.pciexbar = CONFIG_MMCONF_BASE_ADDRESS,
.smbusbar = CONFIG_FIXED_SMBUS_IO_BASE,
- .hpet_address = HPET_ADDR,
+ .hpet_address = CONFIG_HPET_ADDRESS,
.rcba = CONFIG_FIXED_RCBA_MMIO_BASE,
.pmbase = DEFAULT_PMBASE,
.gpiobase = DEFAULT_GPIOBASE,
diff --git a/src/southbridge/intel/lynxpoint/pch.h b/src/southbridge/intel/lynxpoint/pch.h
index 9c6a668..000d159 100644
--- a/src/southbridge/intel/lynxpoint/pch.h
+++ b/src/southbridge/intel/lynxpoint/pch.h
@@ -63,8 +63,6 @@
#define DEFAULT_GPIOSIZE 0x80
#endif
-#define HPET_ADDR 0xfed00000
-
#include <southbridge/intel/common/rcba.h>
#ifndef __ACPI__