device/device.h: Rename pci_domain_scan_bus
On all targets the domain works as a host bridge. Xeon-sp code intends
to feature multiple host bridges below a domain, hence rename the
function to pci_host_bridge_scan_bus.
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Change-Id: I4e65fdbaf0b42c5f4f62297a60d818d299d76f73
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78326
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Reviewed-by: Yidi Lin <yidilin@google.com>
diff --git a/src/soc/amd/common/block/data_fabric/domain.c b/src/soc/amd/common/block/data_fabric/domain.c
index 01fad99..4ec52fc 100644
--- a/src/soc/amd/common/block/data_fabric/domain.c
+++ b/src/soc/amd/common/block/data_fabric/domain.c
@@ -28,12 +28,12 @@
/* Set bus first number of PCI root */
domain->link_list->secondary = bus;
- /* subordinate needs to be the same as secondary before pci_domain_scan_bus call. */
+ /* subordinate needs to be the same as secondary before pci_host_bridge_scan_bus call. */
domain->link_list->subordinate = bus;
/* Tell allocator about maximum PCI bus number in domain */
domain->link_list->max_subordinate = limit;
- pci_domain_scan_bus(domain);
+ pci_host_bridge_scan_bus(domain);
}
static void print_df_mmio_outside_of_cpu_mmio_error(unsigned int reg)
diff --git a/src/soc/amd/stoneyridge/chip.c b/src/soc/amd/stoneyridge/chip.c
index eaa0e9a..09cede3 100644
--- a/src/soc/amd/stoneyridge/chip.c
+++ b/src/soc/amd/stoneyridge/chip.c
@@ -84,7 +84,7 @@
.read_resources = domain_read_resources,
.set_resources = pci_domain_set_resources,
.enable_resources = domain_enable_resources,
- .scan_bus = pci_domain_scan_bus,
+ .scan_bus = pci_host_bridge_scan_bus,
.acpi_name = soc_acpi_name,
};