- 1.1.4
Major restructuring of hypertransport handling.
Major rewerite of superio/NSC/pc87360 as a proof of concept for handling superio resources dynamically
Updates to hard_reset handling when resetting because of the need to change hypertransport link
speeds and widths.
(a) No longer assume the boot is good just because we get to a hard reset point.
(b) Set a flag to indicate that the BIOS triggered the reset so we don't decrement the
boot counter.
Updates to arima/hdama mptable so it tracks the new bus numbers
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1097 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
diff --git a/src/include/device/hypertransport.h b/src/include/device/hypertransport.h
new file mode 100644
index 0000000..281f50e
--- /dev/null
+++ b/src/include/device/hypertransport.h
@@ -0,0 +1,9 @@
+#ifndef DEVICE_HYPERTRANSPORT_H
+#define DEVICE_HYPERTRANSPORT_H
+
+unsigned int hypertransport_scan_chain(struct bus *bus, unsigned min_unitid, unsigned int max);
+
+#define HT_IO_HOST_ALIGN 4096
+#define HT_MEM_HOST_ALIGN (1024*1024)
+
+#endif /* DEVICE_HYPERTRANSPORT_H */