nb/intel/sandybridge: Use IOSAV_BYTE_SERROR_C_ch macro
This changes the binary because the operations get reordered, but it is
otherwise equivalent.
Change-Id: I362187b2889e6f7a68bf752a23c1279cebf961f2
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39758
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c
index a8480a7..d10b859 100644
--- a/src/northbridge/intel/sandybridge/raminit_common.c
+++ b/src/northbridge/intel/sandybridge/raminit_common.c
@@ -2626,7 +2626,7 @@
}
/* FIXME: This register only exists on Ivy Bridge */
- raw_stats[edge] = MCHBAR32(0x436c + channel * 0x400);
+ raw_stats[edge] = MCHBAR32(IOSAV_BYTE_SERROR_C_ch(channel));
}
FOR_ALL_LANES {
@@ -2797,8 +2797,8 @@
test_timC_write (ctrl, channel, slotrank);
/* FIXME: Another IVB-only register! */
- raw_stats[timC] =
- MCHBAR32(0x436c + channel * 0x400);
+ raw_stats[timC] = MCHBAR32(
+ IOSAV_BYTE_SERROR_C_ch(channel));
}
FOR_ALL_LANES {
struct run rn;