tree db6608ccc9d1a0e93b569db8ed70ca256089bf9c
parent d87af79ace16a499679d28ba3436950f9d9d090e
author Tim Wawrzynczak <twawrzynczak@chromium.org> 1629819129 -0600
committer Felix Held <felix-coreboot@felixheld.de> 1630002220 +0000

soc/intel/alderlake: Lock PAM registers in finalize

Use the support from the previous patch to have coreboot lock the PAM
registers instead of the FSP when the lockdown configuration is set to
coreboot.

TEST=boot to OS, read PCI 0:0.0 config register 0x80, value is 0x31

Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: I0c3e16edeab6f85a79eb10e1477d95952b554a18
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57146
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>