arch/x86: Drop leftover ROMCC support

Remove the last bits of building romstage with romcc.

Change-Id: I70bb1ed23a5aeb87bf7641e0b0bd604a4e622e61
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/26807
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig
index 8a87778..b545add 100644
--- a/src/arch/x86/Kconfig
+++ b/src/arch/x86/Kconfig
@@ -107,10 +107,6 @@
 	int
 	default 2
 
-config ROMCC
-	bool
-	default n
-
 config CBMEM_TOP_BACKUP
 	def_bool n
 	help
diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc
index 54ce9b0..c15f829 100644
--- a/src/arch/x86/Makefile.inc
+++ b/src/arch/x86/Makefile.inc
@@ -223,46 +223,7 @@
 romstage-y += postcar_loader.c
 romstage-$(CONFIG_COLLECT_TIMESTAMPS_TSC) += timestamp.c
 
-ifneq ($(CONFIG_ROMCC),y)
-
 romstage-srcs += $(src)/mainboard/$(MAINBOARDDIR)/romstage.c
-
-else # CONFIG_ROMCC == y
-
-# This order matters. The mainboards requiring ROMCC need their mainboard
-# code to follow the prior crt0s files for program flow control. The
-# romstage.inc from the MAINBOARDDIR is implicitly main() for romstage
-# because of the instruction sequen fall-through.
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
-crt0s += $(src)/arch/x86/crt0_romcc_epilogue.inc
-
-ifeq ($(CONFIG_MMX),y)
-	ifeq ($(CONFIG_SSE),y)
-		ROMCCFLAGS := -mcpu=p4 -O2 # MMX, SSE
-	else
-		ROMCCFLAGS := -mcpu=p2 -O2 # MMX, !SSE
-	endif
-else
-	ROMCCFLAGS := -mcpu=i386 -O2 # !MMX, !SSE
-endif
-
-$(objcbfs)/romstage%.bin: $(objcbfs)/romstage%.elf
-	@printf "    OBJCOPY    $(subst $(obj)/,,$(@))\n"
-	$(OBJCOPY_romstage) -O binary $< $@
-
-$(objcbfs)/romstage%.elf: $(objcbfs)/romstage%.debug
-	@printf "    OBJCOPY    $(subst $(obj)/,,$(@))\n"
-	cp $< $@.tmp
-	$(OBJCOPY_romstage) --strip-debug $@.tmp
-	$(OBJCOPY_romstage) --add-gnu-debuglink=$< $@.tmp
-	mv $@.tmp $@
-
-$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(objutil)/romcc/romcc $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h
-	printf "    ROMCC      romstage.inc\n"
-	$(ROMCC) -c -S $(ROMCCFLAGS) -D__ROMSTAGE__ -D__PRE_RAM__ -I. $(CPPFLAGS_romstage) $< -o $@
-
-endif
-
 romstage-libs ?=
 
 $(eval $(call early_x86_assembly_entry_rule,romstage))
diff --git a/src/arch/x86/crt0_romcc_epilogue.inc b/src/arch/x86/crt0_romcc_epilogue.inc
deleted file mode 100644
index 737549e..0000000
--- a/src/arch/x86/crt0_romcc_epilogue.inc
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * Copyright 2002 Eric Biederman
- *
- * This file is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-#include <cpu/x86/post_code.h>
-
-__main:
-	post_code(POST_PREPARE_RAMSTAGE)
-	cld			/* clear direction flag */
-
-	movl $CONFIG_RAMTOP, %esp
-	movl	%esp, %ebp
-	call copy_and_run
-
-.Lhlt:
-	post_code(POST_DEAD_CODE)
-	hlt
-	jmp	.Lhlt
diff --git a/src/cpu/Kconfig b/src/cpu/Kconfig
index e10a702..a7cb99e 100644
--- a/src/cpu/Kconfig
+++ b/src/cpu/Kconfig
@@ -8,7 +8,7 @@
 
 config CACHE_AS_RAM
 	bool
-	default !ROMCC
+	default y
 
 config NO_CAR_GLOBAL_MIGRATION
 	bool
diff --git a/src/cpu/amd/geode_lx/syspreinit.c b/src/cpu/amd/geode_lx/syspreinit.c
index 801aea9..f30c059 100644
--- a/src/cpu/amd/geode_lx/syspreinit.c
+++ b/src/cpu/amd/geode_lx/syspreinit.c
@@ -35,8 +35,5 @@
 void SystemPreInit(void)
 {
 	/* they want a jump ... */
-#if !IS_ENABLED(CONFIG_CACHE_AS_RAM)
-	__asm__ __volatile__("jmp .+2\ninvd\njmp .+2\n");
-#endif
 	StartTimer1();
 }
diff --git a/src/cpu/x86/Kconfig b/src/cpu/x86/Kconfig
index a20febb..baa4413 100644
--- a/src/cpu/x86/Kconfig
+++ b/src/cpu/x86/Kconfig
@@ -88,7 +88,6 @@
 config XIP_ROM_SIZE
 	hex
 	depends on !NO_FIXED_XIP_ROM_SIZE
-	default ROM_SIZE if ROMCC
 	default 0x10000
 
 config CPU_ADDR_BITS