intel/car/cache_as_ram.inc: Prepare for dynamic CONFIG_RAMTOP
Change-Id: I02881ce465cb3835a6fa7c06b718aa42d0d327ec
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/15227
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
diff --git a/src/mainboard/asus/p3b-f/romstage.c b/src/mainboard/asus/p3b-f/romstage.c
index 89e3795..9d56d5b 100644
--- a/src/mainboard/asus/p3b-f/romstage.c
+++ b/src/mainboard/asus/p3b-f/romstage.c
@@ -24,6 +24,7 @@
#include <northbridge/intel/i440bx/raminit.h>
#include <delay.h>
#include <cpu/x86/bist.h>
+#include <cpu/intel/romstage.h>
#include <superio/winbond/common/winbond.h>
/* FIXME: The ASUS P3B-F has a Winbond W83977EF, actually. */
#include <superio/winbond/w83977tf/w83977tf.h>
@@ -68,8 +69,7 @@
outb(0x67, PM_IO_BASE + 0x37);
}
-#include <cpu/intel/romstage.h>
-void main(unsigned long bist)
+void mainboard_romstage_entry(unsigned long bist)
{
winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
console_init();