fix HPET on some ICH southbridges
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5252 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
diff --git a/src/southbridge/intel/i82801ex/i82801ex_lpc.c b/src/southbridge/intel/i82801ex/i82801ex_lpc.c
index a8b48ae..b9d1907 100644
--- a/src/southbridge/intel/i82801ex/i82801ex_lpc.c
+++ b/src/southbridge/intel/i82801ex/i82801ex_lpc.c
@@ -231,6 +231,7 @@
dword &= ~(3 << 15); /* clear it */
dword |= (code<<15);
+ pci_write_config32(dev, GEN_CNTL, dword);
printk_debug("enabling HPET @0x%lx\n", hpet_address | (code <<12) );
}