cpu/amd/agesa/family15tn: Add udelay implementation for SMM
This is a small implementation which uses only MSRs and rdtsc, without
relying on northbridge or other system hardware. It's SMM safe in that
it only reads registers, and doesn't modify the state of the hardware.
Change-Id: Ifa02ca73455b382f830c9b30b80b4f1bb18706b4
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/5501
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
diff --git a/src/cpu/amd/agesa/family15tn/Makefile.inc b/src/cpu/amd/agesa/family15tn/Makefile.inc
index 19a2f0f..a8f644d 100644
--- a/src/cpu/amd/agesa/family15tn/Makefile.inc
+++ b/src/cpu/amd/agesa/family15tn/Makefile.inc
@@ -20,6 +20,8 @@
ramstage-y += chip_name.c
ramstage-y += model_15_init.c
+smm-$(CONFIG_HAVE_SMI_HANDLER) += udelay.c
+
subdirs-y += ../../mtrr
subdirs-y += ../../smm
subdirs-y += ../../../x86/tsc