soc/amd: Move global_smi_enable to common/blocks/smi/smi_util
Change-Id: I4410772a8d3f2dedbb96601d87efb23b14e5f438
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42989
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/soc/amd/common/block/smi/smi_util.c b/src/soc/amd/common/block/smi/smi_util.c
index dcf0c84..1e4561d 100644
--- a/src/soc/amd/common/block/smi/smi_util.c
+++ b/src/soc/amd/common/block/smi/smi_util.c
@@ -56,6 +56,15 @@
smi_write32(SMI_REG_SMITRIG0, reg32);
}
+/** Set the EOS bit and enable SMI generation from southbridge */
+void global_smi_enable(void)
+{
+ uint32_t reg = smi_read32(SMI_REG_SMITRIG0);
+ reg &= ~SMITRG0_SMIENB; /* Enable SMI generation */
+ reg |= SMITRG0_EOS; /* Set EOS bit */
+ smi_write32(SMI_REG_SMITRIG0, reg);
+}
+
void soc_route_sci(uint8_t event)
{
smi_write8(SMI_SCI_MAP(event), event);
diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc
index b7eed5b..ddab522 100644
--- a/src/soc/amd/picasso/Makefile.inc
+++ b/src/soc/amd/picasso/Makefile.inc
@@ -48,7 +48,6 @@
ramstage-y += acp.c
ramstage-y += sata.c
ramstage-y += memmap.c
-ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c
ramstage-y += uart.c
ramstage-y += finalize.c
ramstage-y += soc_util.c
diff --git a/src/soc/amd/picasso/smi.c b/src/soc/amd/picasso/smi.c
deleted file mode 100644
index fb6d348..0000000
--- a/src/soc/amd/picasso/smi.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-
-/*
- * Utilities for SMM setup
- */
-
-#include <console/console.h>
-#include <cpu/x86/smm.h>
-#include <amdblocks/acpimmio.h>
-#include <soc/southbridge.h>
-#include <soc/smi.h>
-
-/** Set the EOS bit and enable SMI generation from southbridge */
-void global_smi_enable(void)
-{
- uint32_t reg = smi_read32(SMI_REG_SMITRIG0);
- reg &= ~SMITRG0_SMIENB; /* Enable SMI generation */
- reg |= SMITRG0_EOS; /* Set EOS bit */
- smi_write32(SMI_REG_SMITRIG0, reg);
-}
diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc
index 47ecbe7..f711c3a 100644
--- a/src/soc/amd/stoneyridge/Makefile.inc
+++ b/src/soc/amd/stoneyridge/Makefile.inc
@@ -58,7 +58,6 @@
ramstage-y += northbridge.c
ramstage-y += sata.c
ramstage-y += memmap.c
-ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c
ramstage-y += uart.c
ramstage-y += usb.c
ramstage-y += tsc_freq.c
diff --git a/src/soc/amd/stoneyridge/smi.c b/src/soc/amd/stoneyridge/smi.c
deleted file mode 100644
index fb6d348..0000000
--- a/src/soc/amd/stoneyridge/smi.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-
-/*
- * Utilities for SMM setup
- */
-
-#include <console/console.h>
-#include <cpu/x86/smm.h>
-#include <amdblocks/acpimmio.h>
-#include <soc/southbridge.h>
-#include <soc/smi.h>
-
-/** Set the EOS bit and enable SMI generation from southbridge */
-void global_smi_enable(void)
-{
- uint32_t reg = smi_read32(SMI_REG_SMITRIG0);
- reg &= ~SMITRG0_SMIENB; /* Enable SMI generation */
- reg |= SMITRG0_EOS; /* Set EOS bit */
- smi_write32(SMI_REG_SMITRIG0, reg);
-}