| commit | 062fdf13b8b7593c729401a5281087c3a09998d2 | [log] [tgz] |
|---|---|---|
| author | Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> | Tue Jan 22 18:27:22 2019 +0530 |
| committer | Patrick Georgi <pgeorgi@google.com> | Thu Jan 24 14:21:37 2019 +0000 |
| tree | e9456b6953dc2017cb5d03f0f5436108d6d6a1ea | |
| parent | d19f4e50aa84d7eec717cab980731a168e59d388 [diff] |
mb/google/sarien/variants: Set tcc offset value Set tcc offset value to 5 degree celsius for Sarien system. BRANCH=None BUG=b:122636962 TEST=Built and tested on Sarien system Change-Id: I06fbf6a0810028458bdd28d0d8a4e3b645f279ca Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-on: https://review.coreboot.org/c/31037 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Naresh Solanki <naresh.solanki@intel.com>
diff --git a/src/mainboard/google/sarien/variants/arcada/devicetree.cb b/src/mainboard/google/sarien/variants/arcada/devicetree.cb index af8fe18..2b0408e 100644 --- a/src/mainboard/google/sarien/variants/arcada/devicetree.cb +++ b/src/mainboard/google/sarien/variants/arcada/devicetree.cb
@@ -70,6 +70,9 @@ #| I2C1 | Touchpad | #| I2C4 | H1 TPM | #+-------------------+---------------------------+ + + register "tcc_offset" = "5" + register "common_soc_config" = "{ .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT, .i2c[0] = {
diff --git a/src/mainboard/google/sarien/variants/sarien/devicetree.cb b/src/mainboard/google/sarien/variants/sarien/devicetree.cb index 59f1f30..76e5db7 100644 --- a/src/mainboard/google/sarien/variants/sarien/devicetree.cb +++ b/src/mainboard/google/sarien/variants/sarien/devicetree.cb
@@ -75,7 +75,7 @@ #| I2C4 | H1 TPM | #+-------------------+---------------------------+ - register "tcc_offset" = "3" + register "tcc_offset" = "5" register "common_soc_config" = "{ .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT,