mb/google/brya: Add variant specific soc chip config update
This patch adds support for variant specific soc chip config update
function.
Change-Id: Ic3a3ae0b409433e6dfa102c5e7a6322d4f78f730
Signed-off-by: Sugnan Prabhu S <sugnan.prabhu.s@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56411
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
diff --git a/src/mainboard/google/brya/mainboard.c b/src/mainboard/google/brya/mainboard.c
index 1bdd013..1b9e09a 100644
--- a/src/mainboard/google/brya/mainboard.c
+++ b/src/mainboard/google/brya/mainboard.c
@@ -4,8 +4,19 @@
#include <baseboard/variants.h>
#include <device/device.h>
#include <ec/ec.h>
+#include <soc/ramstage.h>
#include <vendorcode/google/chromeos/chromeos.h>
+void mainboard_update_soc_chip_config(struct soc_intel_alderlake_config *config)
+{
+ variant_update_soc_chip_config(config);
+}
+
+__weak void variant_update_soc_chip_config(struct soc_intel_alderlake_config *config)
+{
+ /* default implementation does nothing */
+}
+
static void mainboard_init(void *chip_info)
{
const struct pad_config *base_pads;