soc/amd/common/data_fabric/extended_mmio: fix compile errors
This code only gets built when the SOC selects
SOC_AMD_COMMON_BLOCK_DATA_FABRIC_EXTENDED_MMIO which no SoC before Genoa
does.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ia5495ebf0f157fd0c456ce44acaf1ab222a188dd
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78340
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <ericllai@google.com>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
diff --git a/src/soc/amd/common/block/data_fabric/extended_mmio.c b/src/soc/amd/common/block/data_fabric/extended_mmio.c
index d0c3d9f..a18d936 100644
--- a/src/soc/amd/common/block/data_fabric/extended_mmio.c
+++ b/src/soc/amd/common/block/data_fabric/extended_mmio.c
@@ -10,13 +10,14 @@
{
const uint32_t base_reg = data_fabric_broadcast_read32(DF_MMIO_BASE(reg));
const uint32_t limit_reg = data_fabric_broadcast_read32(DF_MMIO_LIMIT(reg));
- const union df_mmio_addr_ext ext_reg.raw =
- data_fabric_broadcast_read32(DF_MMIO_ADDR_EXT(reg));
+ const union df_mmio_addr_ext ext_reg = {
+ .raw = data_fabric_broadcast_read32(DF_MMIO_ADDR_EXT(reg))
+ };
/* The raw register values in the base and limit registers are bits 47..16 of the
actual address. The MMIO address extension register contains the extended MMIO base
and limit bits starting with bit 48 of the actual address. */
*mmio_base = (resource_t)ext_reg.base_ext << DF_MMIO_EXT_ADDR_SHIFT |
(resource_t)base_reg << DF_MMIO_SHIFT;
- *mmio_limit = (resource_t)ext_reg.limit_ext << DF_MMIO_EXT_ADDR_SHIFT |
- (((resource_t)limit_reg + 1) << DF_MMIO_SHIFT) - 1;
+ *mmio_limit = ((resource_t)ext_reg.limit_ext << DF_MMIO_EXT_ADDR_SHIFT |
+ (((resource_t)limit_reg + 1) << DF_MMIO_SHIFT)) - 1;
}