commit 05d6f5a488380c1c7bf98f91700c17d59f466cc0
author Kyle Lin <kylelinck@google.com> Tue Feb 14 16:52:50 2023 +0800
committer Subrata Banik <subratabanik@google.com> Sat Feb 18 16:00:06 2023 +0000
tree d9349297d778b3dbf503fe5be1c29db79b7d7de8
parent 1000b0f0887cfe6fa5cc8dba8db759ac1d68a164

util/spd_tools/src/spd_gen/lp5.go: Support LP5X 8533Mbps

Add support for LP5X 8533Mbps in SPD tool.

BUG=b:263189532
TEST=None

Change-Id: I72b02514f68647dda996822f910db8bc93f61ca4
Signed-off-by: Kyle Lin <kylelinck@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73038
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marx Wang <marx.wang@intel.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>

util/spd_tools/src/spd_gen/lp5.go

diff --git a/util/spd_tools/src/spd_gen/lp5.go b/util/spd_tools/src/spd_gen/lp5.go
index fbcb44c..3c6495c 100644
--- a/util/spd_tools/src/spd_gen/lp5.go
+++ b/util/spd_tools/src/spd_gen/lp5.go
@@ -209,6 +209,7 @@
 		 *            = 1 / (speed grade / 2 / WCK:CK)      // "double data rate"
 		 */
 		speedToTCKMinPs: map[int]int{
+			8533: 937,  /* 1 / (8533 / 2 / 4) */
 			7500: 1066, /* 1 / (7500 / 2 / 4) */
 			6400: 1250, /* 1 / (6400 / 2 / 4) */
 			5500: 1455, /* 1 / (5500 / 2 / 4) */
@@ -373,6 +374,10 @@
  * From Table 220 of JESD209-5B, using a 4:1 WCK:CK ratio and Set 0.
  */
 var LP5SpeedMbpsToSPDEncoding = map[int]LP5SpeedParams{
+	8533: {
+		defaultTCKMinPs: 234, /* 1 / (8533 / 2) */
+		MaxCASLatency:   23,
+	},
 	7500: {
 		defaultTCKMinPs: 266, /* 1 / (7500 / 2) */
 		MaxCASLatency:   20,