- 2.0.0
  - this NEWS file is neglected in favor of the svn commit logs.
    See http://tracker.coreboot.org/
- 1.1.8
  - Store everything in arch
- 1.1.7
  - The configuration language has been cleaned up.  No more link keyword.
  - Everything is now in the device tree.
  - The static and dynamic device trees have been unified
  - Support for setting the pci subsystem vendor and pci subsystem device has been added.
  - 64bit resource support
  - Generic smbus support
- 1.1.6
  - pnp/superio devices are now handled cleanly with very little code
  - Initial support for finding x86 BIST errors
  - static resource assignments can now be specified in Config.lb
  - special VGA I/O decode now should work
  - added generic PCI error reporting enables
  - build_opt_tbl now generates a header that allows cmos settings to
    be read from romcc compiled code.
  - split IORESOURCE_SET into IORESOURCE_ASSIGNED and IORESOURCE_STORED
  - romcc now gracesfully handles function pointers instead of dying mysteriously
  - First regression test in amdk8/raminit_test
- 1.1.5
  - O2, enums, and switch statements work in romcc
  - Support for compiling romcc on non x86 platforms
  - new romc options -msse and -mmmx for specifying extra registers to use
  - Bug fixes to device the device disable/enable framework and an amd8111 implementation
  - Move the link specification to the chip specification instead of the path
  - Allow specifying devices with internal bridges.
  - Initial via epia support
  - Opteron errata fixes
- 1.1.4
  Major restructuring of hypertransport handling.
  Major rewerite of superio/NSC/pc87360 as a proof of concept for handling superio resources dynamically
  Updates to hard_reset handling when resetting because of the need to change hypertransport link
    speeds and widths. 
    (a) No longer assume the boot is good just because we get to a hard reset point.
    (b) Set a flag to indicate that the BIOS triggered the reset so we don't decrement the
        boot counter.
  Updates to arima/hdama mptable so it tracks the new bus numbers
- 1.1.3
  Major update of the dyanmic device tree to so it can handle
  * subtractive resources
  * merging with the static device tree
  * more device types than just pci
- 1.1.2
  Add back in the hard_reset method from freebios1 this allows generic
  code to reset the box.  
  Update the hypertransport setup code to automatically optimize
  hypertransport link widths and frequencies, and to call hard_reset
  if necessary for the changes to go into effect.
- 1.1.1
  Updates to the new configuration system so it works more reliably
  Removed a bunch of unused configuration variables
  Removed a bunch of unused assembly code
- 1.1.0
  A whole bunch of random ppc and opteron work we never put a good label on
- 1.1.0
Intial development release of LinuxBIOS.
Everything is thrown overboard and will be reincluded as necessary so we can
get rid of the legacy baggage.  Since LinuxBIOS was started we have developed
some better techniques for some things, but we still hang on to the old ways
because some ports that we want not to break depend on them.  So we preserve
them by preserve the 1.0.x series and keeping only the best practices for
the 1.1.x series.  When there is a stable port this code base will
become LinuxBIOS 2.0.x and the core will become frozen.