| commit | 04b28608087dd12447f8f5f7d891745e4864aff1 | [log] [tgz] |
|---|---|---|
| author | Angel Pons <th3fanbus@gmail.com> | Mon May 17 13:54:24 2021 +0200 |
| committer | Patrick Georgi <pgeorgi@google.com> | Thu May 20 17:45:33 2021 +0000 |
| tree | aad1774ba15892f46a05bfd72296294f520dadab | |
| parent | ed1e25de525fe2649bf5af2b448f7b37e34c54f6 [diff] |
mb/asus/p8h61-m_lx/devicetree.cb: Rewrite number in hex Done for consistency with the other variants. Tested with BUILD_TIMELESS=1, Asus P8H61-M LX remains identical. Change-Id: I440706f6fa11d3c2410c445cb7e946c063578c4e Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/54376 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tristan Corrick <tristan@corrick.kiwi>
diff --git a/src/mainboard/asus/h61-series/variants/p8h61-m_lx/devicetree.cb b/src/mainboard/asus/h61-series/variants/p8h61-m_lx/devicetree.cb index 2761190..05b8e38 100644 --- a/src/mainboard/asus/h61-series/variants/p8h61-m_lx/devicetree.cb +++ b/src/mainboard/asus/h61-series/variants/p8h61-m_lx/devicetree.cb
@@ -19,7 +19,7 @@ device pci 02.0 on end # VGA controller chip southbridge/intel/bd82x6x - register "c2_latency" = "101" + register "c2_latency" = "0x0065" register "gen1_dec" = "0x00000295" # Super I/O HWM register "sata_port_map" = "0x33" register "spi_lvscc" = "0x2005"