commit 0405de978401760df45120600a3bc95c66ae3781
author Andrey Petrov <andrey.petrov@intel.com> Mon Jun 05 13:25:29 2017 -0700
committer Martin Roth <martinroth@google.com> Sun Jul 02 18:50:38 2017 +0000
tree bd7bd436c9f55240f6933671d0cc81899972124c
parent 99f50c7465cd6d75a1e5c6c4452136106092cf3c

intel/block/cse: Add Cannon Lake SoC PCI device ID

Change-Id: Ida822d704b04cc4d1dfffb58003fc308bcb502d0
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/20064
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

src/soc/intel/common/block/cse/cse.c

diff --git a/src/soc/intel/common/block/cse/cse.c b/src/soc/intel/common/block/cse/cse.c
index 1346af4..617684c 100644
--- a/src/soc/intel/common/block/cse/cse.c
+++ b/src/soc/intel/common/block/cse/cse.c
@@ -468,6 +468,7 @@
 static const unsigned short pci_device_ids[] = {
 	PCI_DEVICE_ID_INTEL_APL_CSE0,
 	PCI_DEVICE_ID_INTEL_GLK_CSE0,
+	PCI_DEVICE_ID_INTEL_CNL_CSE0,
 	0,
 };
 
@@ -475,7 +476,7 @@
 	.ops			= &cse_ops,
 	.vendor			= PCI_VENDOR_ID_INTEL,
 	/* SoC/chipset needs to provide PCI device ID */
-	.devices		= pci_device_ids,
+	.devices		= pci_device_ids
 };
 
 #endif