commit 035df005c5b9b473c2d61601c098792a34527a52
author Elyes HAOUAS <ehaouas@noos.fr> Mon Oct 03 21:54:16 2016 +0200
committer Martin Roth <martinroth@google.com> Fri Oct 07 18:08:03 2016 +0200
tree 0c2afbd8f6dc4d773ee4a720a4348ba254a78104
parent c44fb50185571b6bdf4febcc4cc1476a79c67ae2

src/southbridge: Remove whitespace after sizeof

Change-Id: Ic3b599d49a4c03ad8035c558b975f31cb91d253b
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16862
Tested-by: build bot (Jenkins)
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Martin Roth <martinroth@google.com>

src/southbridge/intel/bd82x6x/lpc.c

diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c
index 9041816..623482e 100644
--- a/src/southbridge/intel/bd82x6x/lpc.c
+++ b/src/southbridge/intel/bd82x6x/lpc.c
@@ -653,7 +653,7 @@
 
 static void southbridge_inject_dsdt(device_t dev)
 {
-	global_nvs_t *gnvs = cbmem_add (CBMEM_ID_ACPI_GNVS, sizeof (*gnvs));
+	global_nvs_t *gnvs = cbmem_add (CBMEM_ID_ACPI_GNVS, sizeof(*gnvs));
 	void *opregion;
 
 	/* Calling northbridge code as gnvs contains opregion address.  */
@@ -661,7 +661,7 @@
 
 	if (gnvs) {
 		const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
-		memset(gnvs, 0, sizeof (*gnvs));
+		memset(gnvs, 0, sizeof(*gnvs));
 
 		acpi_create_gnvs(gnvs);