soc/intel: Make use of PMC low power program from common block
List of changes:
1. Select PMC_LOW_POWER_MODE_PROGRAM from applicable SoC directory
2. Remove redundant PMC programming from SoC and refer to common
code block
3. Remove unused 'reg8' and 'reg32' variable as applicable from SoC
function.
Change-Id: I18894c49cfc6e88675b5fb71bca0412e5639fb4b
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45796
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig
index ac98779..bf05d37 100644
--- a/src/soc/intel/tigerlake/Kconfig
+++ b/src/soc/intel/tigerlake/Kconfig
@@ -33,6 +33,7 @@
select FSP_PEIM_TO_PEIM_INTERFACE
select REG_SCRIPT
select PMC_GLOBAL_RESET_ENABLE_LOCK
+ select PMC_LOW_POWER_MODE_PROGRAM
select SOC_INTEL_COMMON
select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
select SOC_INTEL_COMMON_BLOCK
diff --git a/src/soc/intel/tigerlake/finalize.c b/src/soc/intel/tigerlake/finalize.c
index 5bf01de..2cc9671 100644
--- a/src/soc/intel/tigerlake/finalize.c
+++ b/src/soc/intel/tigerlake/finalize.c
@@ -15,6 +15,7 @@
#include <device/pci.h>
#include <intelblocks/lpc_lib.h>
#include <intelblocks/pcr.h>
+#include <intelblocks/pmclib.h>
#include <intelblocks/tco.h>
#include <intelblocks/thermal.h>
#include <spi-generic.h>
@@ -28,10 +29,7 @@
static void pch_finalize(void)
{
- uint32_t reg32;
- uint8_t *pmcbase;
config_t *config;
- uint8_t reg8;
/* TCO Lock down */
tco_lockdown();
@@ -50,19 +48,12 @@
* returns NULL for PCH_DEV_PMC device.
*/
config = config_of_soc();
- pmcbase = pmc_mmio_regs();
- if (config->PmTimerDisabled) {
- reg8 = read8(pmcbase + PCH_PWRM_ACPI_TMR_CTL);
- reg8 |= (1 << 1);
- write8(pmcbase + PCH_PWRM_ACPI_TMR_CTL, reg8);
- }
+ if (config->PmTimerDisabled)
+ pmc_disable_acpi_timer();
/* Disable XTAL shutdown qualification for low power idle. */
- if (config->s0ix_enable) {
- reg32 = read32(pmcbase + CPPMVRIC);
- reg32 |= XTALSDQDIS;
- write32(pmcbase + CPPMVRIC, reg32);
- }
+ if (config->s0ix_enable)
+ pmc_ignore_xtal_shutdown();
pmc_clear_pmcon_sts();
}
diff --git a/src/soc/intel/tigerlake/include/soc/pmc.h b/src/soc/intel/tigerlake/include/soc/pmc.h
index b7a97cc8..f926799 100644
--- a/src/soc/intel/tigerlake/include/soc/pmc.h
+++ b/src/soc/intel/tigerlake/include/soc/pmc.h
@@ -126,6 +126,7 @@
enum pch_pmc_xtal pmc_get_xtal_freq(void);
#define PCH_PWRM_ACPI_TMR_CTL 0x18FC
+#define ACPI_TIM_DIS (1 << 1)
#define GPIO_GPE_CFG 0x1920
#define GPE0_DWX_MASK 0xf
#define GPE0_DW_SHIFT(x) (4*(x))