soc/intel: Make use of PMC low power program from common block

List of changes:
1. Select PMC_LOW_POWER_MODE_PROGRAM from applicable SoC directory
2. Remove redundant PMC programming from SoC and refer to common
code block
3. Remove unused 'reg8' and 'reg32' variable as applicable from SoC
function.

Change-Id: I18894c49cfc6e88675b5fb71bca0412e5639fb4b
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45796
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/soc/intel/elkhartlake/Kconfig b/src/soc/intel/elkhartlake/Kconfig
index 1a0bfd2..7e78805 100644
--- a/src/soc/intel/elkhartlake/Kconfig
+++ b/src/soc/intel/elkhartlake/Kconfig
@@ -32,6 +32,7 @@
 	select FSP_PEIM_TO_PEIM_INTERFACE
 	select REG_SCRIPT
 	select PMC_GLOBAL_RESET_ENABLE_LOCK
+	select PMC_LOW_POWER_MODE_PROGRAM
 	select CPU_INTEL_COMMON_SMM
 	select SOC_INTEL_COMMON
 	select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
diff --git a/src/soc/intel/elkhartlake/finalize.c b/src/soc/intel/elkhartlake/finalize.c
index e9b3f21..bae8bcf 100644
--- a/src/soc/intel/elkhartlake/finalize.c
+++ b/src/soc/intel/elkhartlake/finalize.c
@@ -9,6 +9,7 @@
 #include <device/pci.h>
 #include <intelblocks/lpc_lib.h>
 #include <intelblocks/pcr.h>
+#include <intelblocks/pmclib.h>
 #include <intelblocks/tco.h>
 #include <intelblocks/thermal.h>
 #include <soc/p2sb.h>
@@ -22,10 +23,7 @@
 
 static void pch_finalize(void)
 {
-	uint32_t reg32;
-	uint8_t *pmcbase;
 	config_t *config;
-	uint8_t reg8;
 
 	/* TCO Lock down */
 	tco_lockdown();
@@ -44,19 +42,12 @@
 	 * returns NULL for PCH_DEV_PMC device.
 	 */
 	config = config_of_soc();
-	pmcbase = pmc_mmio_regs();
-	if (config->PmTimerDisabled) {
-		reg8 = read8(pmcbase + PCH_PWRM_ACPI_TMR_CTL);
-		reg8 |= (1 << 1);
-		write8(pmcbase + PCH_PWRM_ACPI_TMR_CTL, reg8);
-	}
+	if (config->PmTimerDisabled)
+		pmc_disable_acpi_timer();
 
 	/* Disable XTAL shutdown qualification for low power idle. */
-	if (config->s0ix_enable) {
-		reg32 = read32(pmcbase + CPPMVRIC);
-		reg32 |= XTALSDQDIS;
-		write32(pmcbase + CPPMVRIC, reg32);
-	}
+	if (config->s0ix_enable)
+		pmc_ignore_xtal_shutdown();
 
 	pmc_clear_pmcon_sts();
 }
diff --git a/src/soc/intel/elkhartlake/include/soc/pmc.h b/src/soc/intel/elkhartlake/include/soc/pmc.h
index 9e6d22f..f331961 100644
--- a/src/soc/intel/elkhartlake/include/soc/pmc.h
+++ b/src/soc/intel/elkhartlake/include/soc/pmc.h
@@ -98,6 +98,7 @@
 #define   PCH2CPU_TT_EN			(1 << 26)
 
 #define PCH_PWRM_ACPI_TMR_CTL		0x18FC
+#define  ACPI_TIM_DIS			(1 << 1)
 #define GPIO_GPE_CFG			0x1920
 #define  GPE0_DWX_MASK			0xf
 #define  GPE0_DW_SHIFT(x)		(4*(x))