tree 1f3b6ee5f26da3f3ef3b5a57f2d1037ab20f0e67
parent 0d93ca48c070847f156720a9cb15f9d5429615f4
author Raul E Rangel <rrangel@chromium.org> 1621636312 -0600
committer Raul Rangel <rrangel@chromium.org> 1621956027 +0000

soc/amd/common/block/espi: Increase ESPI_CH_READY_TIMEOUT_US to 10ms

The ChromeEC might take longer than 1ms for the peripheral channel to be
enabled. The PLTRST# interrupt handler takes about ~539us.
This doesn't account for the time it takes for the interrupt handler
to be scheduled. Increasing the timeout to 10ms gives ample time.

BUG=b:188188172, b:188935533
TEST=Boot guybrush and no longer see channel enable errors

Suggested-by: Rob Barnes <robbarnes@google.com>
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: Ib6db577bf06175ceb17b446af706ad8c9f891481
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54788
Reviewed-by: Jason Glenesk <jason.glenesk@amd.corp-partner.google.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>