| commit | 02820ca1862fdf7078aa0749d3f2ef5c80b0daba | [log] [tgz] |
|---|---|---|
| author | Elyes HAOUAS <ehaouas@noos.fr> | Sun Sep 30 07:44:39 2018 +0200 |
| committer | Patrick Georgi <pgeorgi@google.com> | Thu Oct 04 09:38:04 2018 +0000 |
| tree | 4bf69038ca2831385ab763bb031491283a7e571e | |
| parent | 0562c1e75820b05c4a278538496e8a3ffc660866 [diff] [blame] |
cpu/intel/car: Fix typo Change-Id: If71ab647f012a735c6aa6939463414407757ab9a Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/28805 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
diff --git a/src/cpu/intel/car/p3/cache_as_ram.S b/src/cpu/intel/car/p3/cache_as_ram.S index b3bf230..121d169 100644 --- a/src/cpu/intel/car/p3/cache_as_ram.S +++ b/src/cpu/intel/car/p3/cache_as_ram.S
@@ -43,7 +43,7 @@ wrmsr jnz clear_fixed_mtrr - /* Figure put how many MTRRs we have, and clear them out */ + /* Figure out how many MTRRs we have, and clear them out */ mov $MTRR_CAP_MSR, %ecx rdmsr movzb %al, %ebx /* Number of variable MTRRs */