| commit | 025d819ee1d2f0e16af38d68fd7bb50c743b4960 | [log] [tgz] |
|---|---|---|
| author | Mariusz Szafranski <mariuszx.szafranski@intel.com> | Tue Sep 12 14:15:35 2017 +0200 |
| committer | Martin Roth <martinroth@google.com> | Fri Sep 15 02:42:07 2017 +0000 |
| tree | 1c2e88fd820e9d0797aa00b2e5f81b19e42eb481 | |
| parent | e69a9c75816dd3cd6a9af50a09eb090ea00cfed4 [diff] |
MAINTAINERS: Add INTEL FSP DENVERTON-NS SOC & HARCUVAR CRB
Add Intel FSP Atom C3000 SoC ("Denverton" and "Denverton-NS")
and Harcuvar CRB to the list.
Change-Id: I1c4bfd0900e8d425b95b5ef6c541b1e988846667
Signed-off-by: Mariusz Szafranski <mariuszx.szafranski@intel.com>
Reviewed-on: https://review.coreboot.org/21515
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: FEI WANG <wangfei.jimei@gmail.com>