nb/intel/gm45: Allow for PCI BARs above 4G
Linux needs to know that allocating BARs above 4G is fine so reserve a
region in ACPI for that.
Tested on thinkpad X200: a PCIe window gets allocated above 4G and
Linux does not relocate it.
Change-Id: I62a8a656481eba01add3d7d06b42e3352206df1b
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64094
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
diff --git a/src/northbridge/intel/gm45/acpi/hostbridge.asl b/src/northbridge/intel/gm45/acpi/hostbridge.asl
index 2a8a137..ff86b3f 100644
--- a/src/northbridge/intel/gm45/acpi/hostbridge.asl
+++ b/src/northbridge/intel/gm45/acpi/hostbridge.asl
@@ -188,6 +188,12 @@
0x00000000, 0x00000000, 0xfebfffff, 0x00000000,
IO_APIC_ADDR,,, PM01)
+ /* PCI Memory Region above 4G TOUUD -> 1 << cpu_addr_bits */
+ QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
+ Cacheable, ReadWrite,
+ 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000,,, PM02)
+
/* TPM Area (0xfed40000-0xfed44fff) */
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
Cacheable, ReadWrite,
@@ -195,6 +201,9 @@
0x00005000,,, TPMR)
})
+External (A4GS, IntObj)
+External (A4GB, IntObj)
+
/* Current Resource Settings */
Method (_CRS, 0, Serialized)
{
@@ -211,5 +220,15 @@
PMIN = ^MCHC.TLUD << 20
PLEN = PMAX - PMIN + 1
+ if (A4GS != 0) {
+ CreateQwordField(MCRS, ^PM02._MIN, MMIN)
+ CreateQwordField(MCRS, ^PM02._MAX, MMAX)
+ CreateQwordField(MCRS, ^PM02._LEN, MLEN)
+ /* Set 64bit MMIO resource base and length */
+ MLEN = A4GS
+ MMIN = A4GB
+ MMAX = MMIN + MLEN - 1
+ }
+
Return (MCRS)
}