tree a921d334544a5603e44debb12a3cb5d4ab980d37
parent 63660592dc50e9a94c60411fb58b6436755eea01
author Michael Niewöhner <foss@mniewoehner.de> 1605221437 +0100
committer Michael Niewöhner <foss@mniewoehner.de> 1641692842 +0000

soc/intel/{icl,tgl,jsl,ehl}: enable ACPI CPPC entries

Enable CPPC entries generation, needed for Intel SpeedShift.

This can be tested by checking sysfs in Linux:
$ grep . /sys/devices/system/cpu/cpu?/acpi_cppc/*perf

The output should look like this, while the values may differ:

  /sys/devices/system/cpu/cpu0/acpi_cppc/highest_perf:28
  /sys/devices/system/cpu/cpu0/acpi_cppc/lowest_nonlinear_perf:5
  /sys/devices/system/cpu/cpu0/acpi_cppc/lowest_perf:1
  /sys/devices/system/cpu/cpu0/acpi_cppc/nominal_perf:24
  /sys/devices/system/cpu/cpu1/acpi_cppc/highest_perf:28
  /sys/devices/system/cpu/cpu1/acpi_cppc/lowest_nonlinear_perf:5
  ...

Change-Id: I910b4e17d4044f1bf1ecfa0643ac62fc7a8cb51b
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47543
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lance Zhao
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Sheng Lean Tan <sheng.tan@9elements.com>