mb/system76/adl: Add Oryx Pro 9 as a variant
The Oryx Pro 9 (oryp9) is an Alder Lake-P board.
Tested with a custom TianoCore UefiPayloadPkg.
Working:
- PS/2 keyboard, touchpad
- Both DIMM slots (with NMSO480E82-3200EA00)
- Both M.2 NVME SSD slots (with MZVL2500HCJQ)
- All USB ports
- SD card reader
- Webcam
- Ethernet
- WiFi/Bluetooth
- Integrated graphics using Intel GOP driver
- Internal microphone
- Internal speakers
- Combined headphone + mic 3.5mm audio
- 3.5mm microphone input
- S0ix suspend/resume
- Booting Pop!_OS Linux 22.04 with kernel 6.1.11
- Internal flashing with flashrom v1.2-1203-gf4ddd3234330
Not working:
- Discrete/Hybrid graphics
- HDMI output (requires NVIDIA GPU)
- Mini DisplayPort output (requires NVIDIA GPU)
- Detection of devices in TBT slot on boot
Change-Id: I8aac3e83f4423f444cb9ce8aa562ba465eb718c1
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65610
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jeremy Soller <jeremy@system76.com>
diff --git a/Documentation/mainboard/index.md b/Documentation/mainboard/index.md
index 342a1f1..0c51fe3 100644
--- a/Documentation/mainboard/index.md
+++ b/Documentation/mainboard/index.md
@@ -216,6 +216,7 @@
- [Oryx Pro 6](system76/oryp6.md)
- [Oryx Pro 7](system76/oryp7.md)
- [Oryx Pro 8](system76/oryp8.md)
+- [Oryx Pro 9](system76/oryp9.md)
## Texas Instruments
diff --git a/Documentation/mainboard/system76/oryp9.md b/Documentation/mainboard/system76/oryp9.md
new file mode 100644
index 0000000..87e176b
--- /dev/null
+++ b/Documentation/mainboard/system76/oryp9.md
@@ -0,0 +1,67 @@
+# System76 Oryx Pro 9 (oryp9)
+
+## Specs
+
+- CPU
+ - Intel Core i7-12700H
+- EC
+ - ITE IT5570E running [System76 EC](https://github.com/system76/ec)
+- Graphics
+ - dGPU options:
+ - NVIDIA GeForce RTX 3070 Ti (Max-Q)
+ - NVIDIA GeForce RTX 3080 Ti (Max-Q)
+ - eDP options:
+ - 15.6" 1920x1080@144Hz LCD (BOE NV156FHM-NY5)
+ - 17.3" 1920x1080@144Hz LCD (BOE NV173FHM-NY1)
+ - 1x HDMI 2.1
+ - 1x Mini DisplayPort 1.4
+ - 1x DisplayPort 1.4 over USB-C
+- Memory
+ - Up to 64GB (2x32GB) dual-channel DDR4 SO-DIMMs @ 3200 MHz
+- Networking
+ - Gigabit Ethernet
+ - M.2 NVMe/CNVi WiFi/Bluetooth (Intel Wi-Fi 6 AX200/201)
+- Power
+ - 230W (20V, 11.5A) AC barrel adapter (Lite-On PA-1231-26)
+ - 80Wh 6-cell Lithium-ion battery
+- Sound
+ - Realtek ALC1220 codec
+ - TI TAS5825M smart amp
+ - Internal speakers and microphone
+ - Combined 3.5mm headphone & microphone jack
+ - Combined 3.5mm microphone & S/PDIF jack
+ - HDMI, mDP, USB-C DP audio
+- Storage
+ - 2x M.2 PCIe NVMe Gen 4 SSD
+ - MicroSD card reader (RTS5227S)
+- USB
+ - 1x USB Type-C with Thunderbolt 4
+ - 1x USB 3.2 (Gen 2) Type-C
+ - 2x USB 3.2 (Gen 1) Type-A
+- Dimensions
+ - 15": 35.814cm x 24.003cm x 2.489cm, 1.99kg
+ - 17": 39.599cm x 26.213cm x 2.489cm, 2.3kg
+
+## Flashing coreboot
+
+```eval_rst
++---------------------+---------------------+
+| Type | Value |
++=====================+=====================+
+| Socketed flash | no |
++---------------------+---------------------+
+| Vendor | Macronix |
++---------------------+---------------------+
+| Model | MX25L25673G |
++---------------------+---------------------+
+| Size | 32 MiB |
++---------------------+---------------------+
+| Package | WSON-8 |
++---------------------+---------------------+
+| Internal flashing | yes |
++---------------------+---------------------+
+| External flashing | yes |
++---------------------+---------------------+
+```
+
+The flash chip (U61) is left of the DIMM slots.
diff --git a/src/mainboard/system76/adl/Kconfig b/src/mainboard/system76/adl/Kconfig
index 9329ee0..00f19fb 100644
--- a/src/mainboard/system76/adl/Kconfig
+++ b/src/mainboard/system76/adl/Kconfig
@@ -1,4 +1,4 @@
-if BOARD_SYSTEM76_DARP8 || BOARD_SYSTEM76_GALP6 || BOARD_SYSTEM76_LEMP11
+if BOARD_SYSTEM76_DARP8 || BOARD_SYSTEM76_GALP6 || BOARD_SYSTEM76_LEMP11 || BOARD_SYSTEM76_ORYP9
config BOARD_SPECIFIC_OPTIONS
def_bool y
@@ -6,8 +6,10 @@
select DRIVERS_I2C_HID
select DRIVERS_INTEL_PMC
select DRIVERS_INTEL_USB4_RETIMER
+ select DRIVERS_I2C_TAS5825M if BOARD_SYSTEM76_ORYP9
select EC_SYSTEM76_EC
- select EC_SYSTEM76_EC_COLOR_KEYBOARD if BOARD_SYSTEM76_DARP8
+ select EC_SYSTEM76_EC_COLOR_KEYBOARD if BOARD_SYSTEM76_DARP8 || BOARD_SYSTEM76_ORYP9
+ select EC_SYSTEM76_EC_DGPU if BOARD_SYSTEM76_ORYP9
select HAVE_ACPI_TABLES
select HAVE_CMOS_DEFAULT
select HAVE_OPTION_TABLE
@@ -31,6 +33,7 @@
default "darp8" if BOARD_SYSTEM76_DARP8
default "galp6" if BOARD_SYSTEM76_GALP6
default "lemp11" if BOARD_SYSTEM76_LEMP11
+ default "oryp9" if BOARD_SYSTEM76_ORYP9
config OVERRIDE_DEVICETREE
default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
@@ -39,16 +42,19 @@
default "darp8" if BOARD_SYSTEM76_DARP8
default "galp6" if BOARD_SYSTEM76_GALP6
default "lemp11" if BOARD_SYSTEM76_LEMP11
+ default "oryp9" if BOARD_SYSTEM76_ORYP9
config MAINBOARD_SMBIOS_PRODUCT_NAME
default "Darter Pro" if BOARD_SYSTEM76_DARP8
default "Galago Pro" if BOARD_SYSTEM76_GALP6
default "Lemur Pro" if BOARD_SYSTEM76_LEMP11
+ default "Oryx Pro" if BOARD_SYSTEM76_ORYP9
config MAINBOARD_VERSION
default "darp8" if BOARD_SYSTEM76_DARP8
default "galp6" if BOARD_SYSTEM76_GALP6
default "lemp11" if BOARD_SYSTEM76_LEMP11
+ default "oryp9" if BOARD_SYSTEM76_ORYP9
config CBFS_SIZE
default 0xA00000
@@ -59,6 +65,9 @@
config DIMM_SPD_SIZE
default 512
+config ONBOARD_VGA_IS_PRIMARY
+ default y
+
config POST_DEVICE
default n
diff --git a/src/mainboard/system76/adl/Kconfig.name b/src/mainboard/system76/adl/Kconfig.name
index fa0b28b..f36b752 100644
--- a/src/mainboard/system76/adl/Kconfig.name
+++ b/src/mainboard/system76/adl/Kconfig.name
@@ -6,3 +6,6 @@
config BOARD_SYSTEM76_LEMP11
bool "lemp11"
+
+config BOARD_SYSTEM76_ORYP9
+ bool "oryp9"
diff --git a/src/mainboard/system76/adl/Makefile.inc b/src/mainboard/system76/adl/Makefile.inc
index f3dc7e1..9dea9f3 100644
--- a/src/mainboard/system76/adl/Makefile.inc
+++ b/src/mainboard/system76/adl/Makefile.inc
@@ -8,5 +8,6 @@
ramstage-y += ramstage.c
ramstage-y += variants/$(VARIANT_DIR)/hda_verb.c
ramstage-y += variants/$(VARIANT_DIR)/gpio.c
+ramstage-$(CONFIG_DRIVERS_I2C_TAS5825M) += variants/$(VARIANT_DIR)/tas5825m.c
SPD_SOURCES = samsung-P4AAF165WA-BCWDE
diff --git a/src/mainboard/system76/adl/variants/oryp9/board_info.txt b/src/mainboard/system76/adl/variants/oryp9/board_info.txt
new file mode 100644
index 0000000..6308388
--- /dev/null
+++ b/src/mainboard/system76/adl/variants/oryp9/board_info.txt
@@ -0,0 +1,2 @@
+Board name: oryp9
+Release year: 2022
diff --git a/src/mainboard/system76/adl/variants/oryp9/data.vbt b/src/mainboard/system76/adl/variants/oryp9/data.vbt
new file mode 100644
index 0000000..0807054
--- /dev/null
+++ b/src/mainboard/system76/adl/variants/oryp9/data.vbt
Binary files differ
diff --git a/src/mainboard/system76/adl/variants/oryp9/gpio.c b/src/mainboard/system76/adl/variants/oryp9/gpio.c
new file mode 100644
index 0000000..5c56f80
--- /dev/null
+++ b/src/mainboard/system76/adl/variants/oryp9/gpio.c
@@ -0,0 +1,227 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <mainboard/gpio.h>
+#include <soc/gpio.h>
+
+static const struct pad_config gpio_table[] = {
+ /* ------- GPIO Group GPD ------- */
+ PAD_CFG_NF(GPD0, UP_20K, PWROK, NF1), // PM_BATLOW#
+ PAD_CFG_NF(GPD1, NATIVE, PWROK, NF1), // AC_PRESENT
+ PAD_NC(GPD2, NONE),
+ PAD_CFG_NF(GPD3, UP_20K, PWROK, NF1), // PWN_BTN#
+ PAD_CFG_NF(GPD4, NONE, PWROK, NF1), // SUSB#_PCH
+ PAD_CFG_NF(GPD5, NONE, PWROK, NF1), // SUSC#_PCH
+ PAD_CFG_NF(GPD6, NONE, PWROK, NF1), // SLP_A#
+ PAD_NC(GPD7, NONE),
+ PAD_CFG_NF(GPD8, NONE, PWROK, NF1), // SUS_CLK
+ PAD_CFG_GPO(GPD9, 0, PWROK), // SLP_WLAN#
+ PAD_CFG_NF(GPD10, NONE, PWROK, NF1), // SLP_S5#
+ PAD_NC(GPD11, NONE),
+
+ /* ------- GPIO Group GPP_A ------- */
+ PAD_CFG_NF(GPP_A0, UP_20K, DEEP, NF1), // ESPI_IO0_EC
+ PAD_CFG_NF(GPP_A1, UP_20K, DEEP, NF1), // ESPI_IO1_EC
+ PAD_CFG_NF(GPP_A2, UP_20K, DEEP, NF1), // ESPI_IO2_EC
+ PAD_CFG_NF(GPP_A3, UP_20K, DEEP, NF1), // ESPI_IO3_EC
+ PAD_CFG_NF(GPP_A4, UP_20K, DEEP, NF1), // ESPI_CS_EC#
+ PAD_CFG_NF(GPP_A5, UP_20K, DEEP, NF1), // ESPI_ALRT0#
+ _PAD_CFG_STRUCT(GPP_A6, 0x80100100, 0x0000), // INTP_8851
+ PAD_CFG_GPI(GPP_A7, NONE, PLTRST), // GC6_FB_EN_PCH
+ PAD_CFG_GPO(GPP_A8, 0, DEEP), // GPIO_LANRTD3
+ PAD_CFG_NF(GPP_A9, DN_20K, DEEP, NF1), // ESPI_CLK_EC
+ PAD_CFG_NF(GPP_A10, NONE, DEEP, NF1), // ESPI_RESET#
+ PAD_NC(GPP_A11, NONE), // GPU_PROCHOT#
+ PAD_NC(GPP_A12, NONE),
+ PAD_CFG_GPO(GPP_A13, 1, PLTRST), // PCH_BT_EN
+ // GPP_A14 (DGPU_PWR_EN) configured in bootblock
+ _PAD_CFG_STRUCT(GPP_A15, 0x46880100, 0x0000), // G_DP_HDPD_E
+ PAD_NC(GPP_A16, NONE), // USB_OC3#
+ PAD_NC(GPP_A17, NONE),
+ _PAD_CFG_STRUCT(GPP_A18, 0x46880100, 0x0000), // HDMI_HPD
+ PAD_NC(GPP_A19, NONE),
+ _PAD_CFG_STRUCT(GPP_A20, 0x46880100, 0x0000), // DP_F_HPD
+ PAD_NC(GPP_A21, NONE),
+ PAD_CFG_GPO(GPP_A22, 0, DEEP), // PCIE4_WAKE_N
+ PAD_CFG_GPI(GPP_A23, UP_20K, DEEP), // GPIO4_NVVDD_EN
+
+ /* ------- GPIO Group GPP_B ------- */
+ PAD_CFG_NF(GPP_B0, NONE, DEEP, NF1), // VCCIN_AUX_VID0
+ PAD_CFG_NF(GPP_B1, NONE, DEEP, NF1), // VCCIN_AUX_VID1
+ // GPP_B2 (DGPU_RST#_CPU) configured in bootblock
+ PAD_CFG_GPI(GPP_B3, NONE, DEEP), // SCI#
+ PAD_CFG_GPI(GPP_B4, NONE, DEEP), // SWI#
+ PAD_CFG_NF(GPP_B5, NONE, DEEP, NF1), // GPPB_I2C2_SDA (Pantone)
+ PAD_CFG_NF(GPP_B6, NONE, DEEP, NF1), // GPPB_I2C2_SCL (Pantone)
+ PAD_CFG_NF(GPP_B7, NONE, DEEP, NF1), // I2C3_SDA (IT8851)
+ PAD_CFG_NF(GPP_B8, NONE, DEEP, NF1), // I2C3_SCL (IT8851)
+ // GPP_B9 missing
+ // GPP_B10 missing
+ PAD_CFG_NF(GPP_B11, NONE, PWROK, NF1), // TBT_I2C_INT
+ PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1), // SLP_S0#
+ PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1), // PLT_RST#
+ PAD_NC(GPP_B14, NONE), // Top swap override
+ PAD_CFG_GPI(GPP_B15, NONE, DEEP), // PS8461_SW
+ PAD_NC(GPP_B16, NONE),
+ PAD_NC(GPP_B17, NONE),
+ PAD_CFG_GPI(GPP_B18, NONE, DEEP), // NO REBOOT strap
+ // GPP_B19 missing
+ // GPP_B20 missing
+ // GPP_B21 missing
+ // GPP_B22 missing
+ PAD_CFG_GPO(GPP_B23, 0, DEEP), // CPUNSSC CLOCK FREQ strap
+
+ /* ------- GPIO Group GPP_C ------- */
+ PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1), // SMB_CLK
+ PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1), // SMB_DATA
+ PAD_CFG_GPO(GPP_C2, 1, PLTRST), // M2_PWR_EN2
+ PAD_CFG_NF(GPP_C3, NONE, DEEP, NF1), // SML0_CLK
+ PAD_CFG_NF(GPP_C4, NONE, DEEP, NF1), // SML0_DATA
+ PAD_CFG_GPO(GPP_C5, 0, DEEP), // ESPI OR EC LESS strap
+ PAD_CFG_NF(GPP_C6, NONE, DEEP, NF1), // TBT_I2C_SCL
+ PAD_CFG_NF(GPP_C7, NONE, DEEP, NF1), // TBT_I2C_SDA
+ // GPP_C8 missing
+ // GPP_C9 missing
+ // GPP_C10 missing
+ // GPP_C11 missing
+ // GPP_C12 missing
+ // GPP_C13 missing
+ // GPP_C14 missing
+ // GPP_C15 missing
+ // GPP_C16 missing
+ // GPP_C17 missing
+ // GPP_C18 missing
+ // GPP_C19 missing
+ // GPP_C20 missing
+ // GPP_C21 missing
+ // GPP_C22 missing
+ // GPP_C23 missing
+
+ /* ------- GPIO Group GPP_D ------- */
+ PAD_CFG_GPO(GPP_D0, 1, DEEP), // SB_BLON
+ PAD_CFG_GPI(GPP_D1, NONE, DEEP), // SB_KBCRST#
+ PAD_CFG_GPO(GPP_D2, 0, DEEP), // ROM_I2C_EN
+ PAD_NC(GPP_D3, NONE),
+ PAD_CFG_GPO(GPP_D4, 1, PLTRST), // GPIO_LAN_EN
+ // GPP_D5 (SSD0_CLKREQ#) configured by FSP
+ PAD_CFG_GPO(GPP_D6, 1, DEEP), // LAN_PLT_RST#
+ // GPP_D7 (WLAN_CLKREQ#) configured by FSP
+ // GPP_D8 (GPU_PCIE_CLKREQ#) configured by FSP
+ PAD_NC(GPP_D9, NONE),
+ PAD_NC(GPP_D10, NONE),
+ PAD_NC(GPP_D11, NONE),
+ PAD_CFG_GPI(GPP_D12, NATIVE, DEEP), // DGPU_PWRGD_R
+ PAD_CFG_GPI(GPP_D13, NONE, DEEP), // WLAN_WAKEUP#
+ PAD_CFG_GPO(GPP_D14, 1, PLTRST), // M2_PWR_EN1
+ PAD_NC(GPP_D15, NONE),
+ PAD_NC(GPP_D16, NONE),
+ PAD_NC(GPP_D17, NONE),
+ PAD_NC(GPP_D18, NONE),
+ PAD_CFG_GPO(GPP_D19, 1, PLTRST), // SATA_LED#
+
+ /* ------- GPIO Group GPP_E ------- */
+ PAD_CFG_GPI(GPP_E0, NONE, DEEP), // CNVI_WAKE#
+ _PAD_CFG_STRUCT(GPP_E1, 0x40100100, 0x3000), // TPM_PIRQ#
+ PAD_CFG_GPI(GPP_E2, NONE, DEEP), // BOARD_ID2
+ PAD_CFG_GPO(GPP_E3, 1, PLTRST), // PCH_WLAN_EN
+ PAD_CFG_GPO(GPP_E4, 0, PLTRST), // TC_RETIMER_FORCE_PWR
+ PAD_NC(GPP_E5, NONE),
+ PAD_CFG_GPI(GPP_E6, NONE, DEEP), // JTAG ODT DISABLE strap
+ PAD_CFG_GPI(GPP_E7, NONE, DEEP), // SMI#
+ PAD_CFG_GPI(GPP_E8, NONE, DEEP), // SLP_DRAM#
+ PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1), // USB_OC0#
+ PAD_CFG_GPI(GPP_E10, NONE, DEEP), // BOARD_ID4
+ PAD_CFG_GPI(GPP_E11, NONE, DEEP), // BOARD_ID1
+ PAD_CFG_GPI_INT(GPP_E12, NONE, PLTRST, LEVEL), // TP_ATTN#
+ PAD_CFG_GPI(GPP_E13, NONE, DEEP), // BOARD_ID3
+ PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1), // EDP_HPD
+ PAD_NC(GPP_E15, NONE),
+ PAD_NC(GPP_E16, NONE),
+ PAD_CFG_GPI(GPP_E17, NONE, DEEP), // BOARD_ID5
+ // GPP_E18 (TBTA_LSX2_TXD) configured by FSP
+ // GPP_E19 (TBTA_LSX2_RXD) configured by FSP
+ PAD_NC(GPP_E20, NONE),
+ PAD_NC(GPP_E21, NONE), // Strap
+ PAD_NC(GPP_E22, NONE),
+ PAD_NC(GPP_E23, NONE),
+
+ /* ------- GPIO Group GPP_F ------- */
+ PAD_CFG_NF(GPP_F0, NONE, DEEP, NF1), // CNVI_BRI_DT
+ PAD_CFG_NF(GPP_F1, UP_20K, DEEP, NF1), // CNVI_BRI_RSP
+ PAD_CFG_NF(GPP_F2, NONE, DEEP, NF1), // CNVI_RGI_DT
+ PAD_CFG_NF(GPP_F3, UP_20K, DEEP, NF1), // CNVI_RGI_RSP
+ PAD_CFG_NF(GPP_F4, NONE, DEEP, NF1), // CNVI_RST#
+ // GPP_F5 (CNVI_CLKREQ) configured by FSP
+ PAD_CFG_NF(GPP_F6, NONE, DEEP, NF1), // CNVI_GNSS_PA_BLANKING
+ PAD_NC(GPP_F7, NONE), // MCRO LDO BYPASS strap
+ // GPP_F8 missing
+ PAD_NC(GPP_F9, NONE),
+ PAD_NC(GPP_F10, NONE), // RSMRSTB SAMPLING strap
+ PAD_NC(GPP_F11, NONE),
+ PAD_CFG_GPO(GPP_F12, 0, DEEP), // OVRM
+ PAD_NC(GPP_F13, NONE),
+ PAD_NC(GPP_F14, NONE),
+ PAD_CFG_GPI(GPP_F15, NONE, DEEP), // BOARD_ID6
+ PAD_CFG_GPI(GPP_F16, NONE, DEEP), // BOARD_ID7
+ PAD_CFG_GPI(GPP_F17, NONE, DEEP), // PLVDD_RST_EC
+ PAD_NC(GPP_F18, NONE),
+ // GPP_F19 (CARD_CLKREQ#) configured by FSP
+ PAD_CFG_GPO(GPP_F20, 1, PLTRST), // M.2_PLT_RST_CNTRL1#
+ PAD_NC(GPP_F21, NONE),
+ PAD_NC(GPP_F22, NONE),
+ PAD_NC(GPP_F23, NONE),
+
+ /* ------- GPIO Group GPP_H ------- */
+ PAD_NC(GPP_H0, NONE),
+ PAD_CFG_GPO(GPP_H1, 1, PLTRST), // M.2_PLT_RST_CNTRL2#
+ PAD_CFG_GPO(GPP_H2, 1, PLTRST), // M.2_PLT_RST_CNTRL3#
+ PAD_CFG_GPI(GPP_H3, NONE, DEEP), // TPM_DET
+ PAD_CFG_NF(GPP_H4, NONE, DEEP, NF1), // I2C_SDA_TP (Touchpad)
+ PAD_CFG_NF(GPP_H5, NONE, DEEP, NF1), // I2C_SCL_TP (Touchpad)
+ PAD_CFG_NF(GPP_H6, NONE, DEEP, NF1), // PCH_I2C_SDA (Retimer)
+ PAD_CFG_NF(GPP_H7, NONE, DEEP, NF1), // PCH_I2C_SCL (Retimer)
+ PAD_CFG_NF(GPP_H8, NONE, DEEP, NF1), // CNVI_MFUART2_RXD
+ PAD_CFG_NF(GPP_H9, NONE, DEEP, NF1), // CNVI_MFUART2_TXD
+ // GPP_H10 (UART0_RX) configured in bootblock
+ // GPP_H11 (UART0_TX) configured in bootblock
+ PAD_NC(GPP_H12, NONE),
+ PAD_NC(GPP_H13, NONE),
+ // GPP_H14 missing
+ PAD_NC(GPP_H15, NONE),
+ // GPP_H16 missing
+ PAD_NC(GPP_H17, NONE),
+ PAD_CFG_NF(GPP_H18, NONE, DEEP, NF1), // CPU_C10_GATE#
+ // GPP_H19 (SSD1_CLKREQ#) configured by FSP
+ PAD_NC(GPP_H20, NONE),
+ PAD_NC(GPP_H21, NONE),
+ PAD_NC(GPP_H22, NONE),
+ // GPP_H23 (GLAN_CLKREQ#) configured by FSP
+
+ /* ------- GPIO Group GPP_R ------- */
+ PAD_CFG_NF(GPP_R0, NONE, DEEP, NF1), // HDA_BITCLK
+ PAD_CFG_NF(GPP_R1, NATIVE, DEEP, NF1), // HDA_SYNC
+ PAD_CFG_NF(GPP_R2, NATIVE, DEEP, NF1), // HDA_SDOUT
+ PAD_CFG_NF(GPP_R3, NATIVE, DEEP, NF1), // HDA_SDIN0
+ PAD_CFG_NF(GPP_R4, NONE, DEEP, NF1), // HDA_RST#
+ PAD_CFG_GPO(GPP_R5, 1, DEEP), // PCH_MUTE#
+ PAD_CFG_GPI(GPP_R6, NONE, DEEP), // GPPR_DMIC_CLK
+ PAD_CFG_GPI(GPP_R7, NONE, DEEP), // GPPR_DMIC_DATA
+
+ /* ------- GPIO Group GPP_S ------- */
+ PAD_NC(GPP_S0, NONE),
+ PAD_NC(GPP_S1, NONE),
+ PAD_NC(GPP_S2, NONE),
+ PAD_NC(GPP_S3, NONE),
+ PAD_NC(GPP_S4, NONE),
+ PAD_NC(GPP_S5, NONE),
+ PAD_NC(GPP_S6, NONE),
+ PAD_NC(GPP_S7, NONE),
+
+ /* ------- GPIO Group GPP_T ------- */
+ PAD_NC(GPP_T2, NONE),
+ PAD_NC(GPP_T3, NONE),
+};
+
+void mainboard_configure_gpios(void)
+{
+ gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table));
+}
diff --git a/src/mainboard/system76/adl/variants/oryp9/gpio_early.c b/src/mainboard/system76/adl/variants/oryp9/gpio_early.c
new file mode 100644
index 0000000..382fe0f
--- /dev/null
+++ b/src/mainboard/system76/adl/variants/oryp9/gpio_early.c
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <mainboard/gpio.h>
+#include <soc/gpio.h>
+
+static const struct pad_config early_gpio_table[] = {
+ PAD_CFG_GPO(GPP_A14, 0, DEEP), // DGPU_PWR_EN
+ PAD_CFG_GPO(GPP_B2, 0, DEEP), // DGPU_RST#_CPU
+ PAD_CFG_NF(GPP_H10, NONE, DEEP, NF1), // UART0_RX
+ PAD_CFG_NF(GPP_H11, NONE, DEEP, NF1), // UART0_TX
+};
+
+void mainboard_configure_early_gpios(void)
+{
+ gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table));
+}
diff --git a/src/mainboard/system76/adl/variants/oryp9/hda_verb.c b/src/mainboard/system76/adl/variants/oryp9/hda_verb.c
new file mode 100644
index 0000000..31d93a9
--- /dev/null
+++ b/src/mainboard/system76/adl/variants/oryp9/hda_verb.c
@@ -0,0 +1,31 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <device/azalia_device.h>
+
+const u32 cim_verb_data[] = {
+ /* Realtek, ALC1220 */
+ 0x10ec1220, /* Vendor ID */
+ 0x155867f5, /* Subsystem ID */
+ 12, /* Number of entries */
+ AZALIA_SUBVENDOR(0, 0x155867f5),
+ AZALIA_RESET(1),
+ AZALIA_PIN_CFG(0, 0x12, 0x90a60130),
+ AZALIA_PIN_CFG(0, 0x14, 0x0421101f),
+ AZALIA_PIN_CFG(0, 0x15, 0x40000000),
+ AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
+ AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
+ AZALIA_PIN_CFG(0, 0x18, 0x04a11040),
+ AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
+ AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
+ AZALIA_PIN_CFG(0, 0x1b, 0x90170110),
+ AZALIA_PIN_CFG(0, 0x1d, 0x40b7952d),
+ AZALIA_PIN_CFG(0, 0x1e, 0x04451150),
+};
+
+const u32 pc_beep_verbs[] = {
+ // Enable DMIC microphone on ALC1220
+ 0x02050036,
+ 0x02042a6a,
+};
+
+AZALIA_ARRAY_SIZES;
diff --git a/src/mainboard/system76/adl/variants/oryp9/overridetree.cb b/src/mainboard/system76/adl/variants/oryp9/overridetree.cb
new file mode 100644
index 0000000..a58c4c3
--- /dev/null
+++ b/src/mainboard/system76/adl/variants/oryp9/overridetree.cb
@@ -0,0 +1,188 @@
+chip soc/intel/alderlake
+ # HACK: Limit PL4 to prevent power off on battery power.
+ register "power_limits_config[ADL_P_642_682_45W_CORE]" = "{
+ .tdp_pl1_override = 45,
+ .tdp_pl2_override = 115,
+ .tdp_psyspl2 = 135,
+ .tdp_pl4 = 72,
+ }"
+
+ # Thermal
+ register "tcc_offset" = "10"
+
+ # GPE configuration
+ register "pmc_gpe0_dw0" = "PMC_GPP_A"
+ register "pmc_gpe0_dw1" = "PMC_GPP_R"
+ register "pmc_gpe0_dw2" = "PMC_GPD"
+
+ device domain 0 on
+ subsystemid 0x1558 0x65f5 inherit
+
+ device ref pcie5_0 on
+ # CPU PCIe RP#2 x8, Clock 3 (DGPU)
+ register "cpu_pcie_rp[CPU_RP(2)]" = "{
+ .clk_src = 3,
+ .clk_req = 3,
+ .flags = PCIE_RP_LTR,
+ }"
+ end
+ device ref igpu on
+ register "ddi_portA_config" = "1"
+ register "ddi_ports_config[DDI_PORT_A]" = "DDI_ENABLE_HPD"
+ end
+ device ref pcie4_0 on
+ # CPU PCIe RP#1 x4, Clock 0 (SSD1)
+ register "cpu_pcie_rp[CPU_RP(1)]" = "{
+ .clk_src = 0,
+ .clk_req = 0,
+ .flags = PCIE_RP_LTR,
+ }"
+ end
+ device ref pcie4_1 on
+ # CPU PCIe RP#3 x4, Clock 4 (SSD2)
+ register "cpu_pcie_rp[CPU_RP(3)]" = "{
+ .clk_src = 4,
+ .clk_req = 4,
+ .flags = PCIE_RP_LTR,
+ }"
+ end
+ device ref tcss_xhci on
+ register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC_SKIP)"
+ chip drivers/usb/acpi
+ device ref tcss_root_hub on
+ chip drivers/usb/acpi
+ register "desc" = ""USB3 TYPEC2""
+ register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
+ device ref tcss_usb3_port1 on end
+ end
+ end
+ end
+ end
+ device ref tcss_dma0 on
+ chip drivers/intel/usb4/retimer
+ register "dfp[0].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E4)"
+ use tcss_usb3_port1 as dfp[0].typec_port
+ device generic 0 on end
+ end
+ end
+ device ref xhci on
+ # USB2
+ register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)" # TYPEC1 (USB 3.2 Gen2)
+ register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # J_USB2
+ register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # J_USB1
+ register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # Per-KB
+ register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # Fingerprint
+ register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # Camera
+ register "usb2_ports[8]" = "USB2_PORT_TYPE_C(OC_SKIP)" # TYPEC2 (Thunderbolt)
+ register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth
+ # USB3
+ register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # TYPEC1 (USB 3.2 Gen2)
+ register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # J_USB2
+ register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # J_USB1
+ # ACPI
+ chip drivers/usb/acpi
+ device ref xhci_root_hub on
+ chip drivers/usb/acpi
+ register "desc" = ""USB2 TYPEC1""
+ register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
+ device ref usb2_port1 on end
+ end
+ chip drivers/usb/acpi
+ register "desc" = ""USB2 J_USB2""
+ register "type" = "UPC_TYPE_A"
+ device ref usb2_port2 on end
+ end
+ chip drivers/usb/acpi
+ register "desc" = ""USB2 J_USB1""
+ register "type" = "UPC_TYPE_A"
+ device ref usb2_port3 on end
+ end
+ chip drivers/usb/acpi
+ register "desc" = ""USB2 Per-KB""
+ register "type" = "UPC_TYPE_INTERNAL"
+ device ref usb2_port6 on end
+ end
+ chip drivers/usb/acpi
+ register "desc" = ""USB2 Fingerprint""
+ register "type" = "UPC_TYPE_INTERNAL"
+ device ref usb2_port7 on end
+ end
+ chip drivers/usb/acpi
+ register "desc" = ""USB2 Camera""
+ register "type" = "UPC_TYPE_INTERNAL"
+ device ref usb2_port8 on end
+ end
+ chip drivers/usb/acpi
+ register "desc" = ""USB2 TYPEC2""
+ register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
+ device ref usb2_port9 on end
+ end
+ chip drivers/usb/acpi
+ register "desc" = ""USB2 Bluetooth""
+ register "type" = "UPC_TYPE_INTERNAL"
+ device ref usb2_port10 on end
+ end
+ chip drivers/usb/acpi
+ register "desc" = ""USB3 TYPEC1""
+ register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
+ device ref usb3_port1 on end
+ end
+ chip drivers/usb/acpi
+ register "desc" = ""USB3 J_USB2""
+ register "type" = "UPC_TYPE_A"
+ device ref usb3_port2 on end
+ end
+ chip drivers/usb/acpi
+ register "desc" = ""USB3 J_USB2""
+ register "type" = "UPC_TYPE_A"
+ device ref usb3_port3 on end
+ end
+ end
+ end
+ end
+ device ref sata off end
+ device ref pcie_rp5 on
+ # PCIe RP#5 x1, Clock 2 (WLAN)
+ register "pch_pcie_rp[PCH_RP(5)]" = "{
+ .clk_src = 2,
+ .clk_req = 2,
+ .flags = PCIE_RP_LTR | PCIE_RP_AER,
+ }"
+ end
+ device ref pcie_rp6 on
+ # PCIe RP#6 x1, Clock 6 (CARD)
+ register "pch_pcie_rp[PCH_RP(6)]" = "{
+ .clk_src = 6,
+ .clk_req = 6,
+ .flags = PCIE_RP_HOTPLUG | PCIE_RP_LTR | PCIE_RP_AER,
+ }"
+ end
+ device ref pcie_rp8 on
+ # PCIe RP#8 x1, Clock 5 (GLAN)
+ register "pch_pcie_rp[PCH_RP(8)]" = "{
+ .clk_src = 5,
+ .clk_req = 5,
+ .flags = PCIE_RP_LTR | PCIE_RP_AER,
+ }"
+ end
+
+ device ref pmc hidden
+ chip drivers/intel/pmc_mux
+ device generic 0 on
+ chip drivers/intel/pmc_mux/conn
+ # TYPEC2
+ use usb2_port9 as usb2_port
+ use tcss_usb3_port1 as usb3_port
+ device generic 0 alias conn0 on end
+ end
+ end
+ end
+ end
+ device ref smbus on
+ chip drivers/i2c/tas5825m
+ register "id" = "0"
+ device i2c 4e on end # (8bit address: 0x9c)
+ end
+ end
+ end
+end
diff --git a/src/mainboard/system76/adl/variants/oryp9/romstage.c b/src/mainboard/system76/adl/variants/oryp9/romstage.c
new file mode 100644
index 0000000..d16b4f8
--- /dev/null
+++ b/src/mainboard/system76/adl/variants/oryp9/romstage.c
@@ -0,0 +1,28 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <soc/meminit.h>
+#include <soc/romstage.h>
+
+void mainboard_memory_init_params(FSPM_UPD *mupd)
+{
+ const struct mb_cfg board_cfg = {
+ .type = MEM_TYPE_DDR4,
+ };
+ const struct mem_spd spd_info = {
+ .topo = MEM_TOPO_DIMM_MODULE,
+ .smbus = {
+ [0] = { .addr_dimm[0] = 0x50, },
+ [1] = { .addr_dimm[0] = 0x52, },
+ },
+ };
+ const bool half_populated = false;
+
+ // Set primary display to internal graphics
+ mupd->FspmConfig.PrimaryDisplay = 0;
+
+ mupd->FspmConfig.PchHdaAudioLinkHdaEnable = 1;
+ mupd->FspmConfig.DmiMaxLinkSpeed = 4;
+ mupd->FspmConfig.GpioOverride = 0;
+
+ memcfg_init(mupd, &board_cfg, &spd_info, half_populated);
+}
diff --git a/src/mainboard/system76/adl/variants/oryp9/tas5825m.c b/src/mainboard/system76/adl/variants/oryp9/tas5825m.c
new file mode 100644
index 0000000..15449cd
--- /dev/null
+++ b/src/mainboard/system76/adl/variants/oryp9/tas5825m.c
@@ -0,0 +1,1238 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <drivers/i2c/tas5825m/tas5825m.h>
+
+int tas5825m_setup(struct device *dev, int id)
+{
+ int res;
+
+ res = tas5825m_set_page(dev, 0x00);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_set_page(dev, 0x00);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_set_page(dev, 0x00);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_set_page(dev, 0x00);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_set_book(dev, 0x00);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_write_at(dev, 0x03, 0x02);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_write_at(dev, 0x01, 0x11);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_set_page(dev, 0x00);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_set_page(dev, 0x00);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_set_page(dev, 0x00);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_set_page(dev, 0x00);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_set_page(dev, 0x00);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_set_book(dev, 0x00);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_write_at(dev, 0x46, 0x11);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_set_page(dev, 0x00);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_write_at(dev, 0x02, 0x00);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_write_at(dev, 0x53, 0x01);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_write_at(dev, 0x54, 0x00);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_write_at(dev, 0x29, 0x7C);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_write_at(dev, 0x03, 0x02);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_write_at(dev, 0xFE, 0x05);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_set_page(dev, 0x00);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_set_page(dev, 0x00);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_set_page(dev, 0x00);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_set_page(dev, 0x00);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_set_page(dev, 0x00);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_write_at(dev, 0x29, 0x00);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_set_book(dev, 0x00);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_write_at(dev, 0x03, 0x12);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_set_page(dev, 0x00);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_set_page(dev, 0x00);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_set_page(dev, 0x00);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_set_page(dev, 0x00);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_set_book(dev, 0x00);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_write_at(dev, 0x48, 0x0C);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_set_book(dev, 0x64);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_set_page(dev, 0x01);
+ if (res < 0)
+ return res;
+
+ {
+ const uint8_t values[] = {
+ 0x00, 0xFE, 0x00, 0x40, 0x00, 0xFC, 0x00, 0x00,
+ 0x00, 0xFC, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x00,
+ 0x00, 0xFC, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x00,
+ 0x00, 0xFC, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x00,
+ 0x00, 0xFC, 0x50, 0x00, 0x00, 0xFC, 0x00, 0x00,
+ 0x00, 0xFC, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x00,
+ 0x00, 0xFC, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x00,
+ 0x00, 0xFC, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x00,
+ 0x00, 0xFC, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x00,
+ 0x00, 0xFC, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x00,
+ 0x00, 0xFC, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x00,
+ 0x00, 0xFC, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x00,
+ 0x00, 0x82, 0x00, 0x93, 0x00, 0xFC, 0x00, 0x00,
+ 0x8F, 0x00, 0xFF, 0xEF, 0x84, 0x49, 0x03, 0x27,
+ 0x84, 0x02, 0x04, 0x06, 0x02, 0x60, 0x00, 0x01,
+ };
+ res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+ if (res < 0)
+ return res;
+ }
+
+ res = tas5825m_set_page(dev, 0x02);
+ if (res < 0)
+ return res;
+
+ {
+ const uint8_t values[] = {
+ 0x02, 0x70, 0x00, 0x06, 0x02, 0x78, 0x00, 0x05,
+ 0x02, 0x68, 0x00, 0x02, 0x02, 0x28, 0x03, 0x4D,
+ 0x84, 0x2A, 0x04, 0x00, 0xE2, 0x57, 0x91, 0x9F,
+ 0x84, 0x82, 0x20, 0xE0, 0x84, 0x82, 0x04, 0x01,
+ 0xF0, 0x1C, 0x31, 0xA0, 0xF0, 0x1C, 0x31, 0xA1,
+ 0xF0, 0x1C, 0x31, 0xA2, 0xF0, 0x1F, 0x31, 0xA3,
+ 0xE4, 0x00, 0x11, 0xA6, 0x80, 0x27, 0x80, 0xE1,
+ 0xF4, 0x00, 0x11, 0xA4, 0xF4, 0x1D, 0x31, 0xA5,
+ 0xF4, 0x1C, 0x31, 0xA7, 0xF4, 0x1F, 0x31, 0xA8,
+ 0x02, 0x78, 0x00, 0x03, 0xE2, 0x68, 0xF1, 0xC3,
+ 0x80, 0x67, 0x80, 0xE9, 0x84, 0x4B, 0x03, 0x27,
+ 0x02, 0x70, 0x00, 0x04, 0x84, 0x41, 0x03, 0x37,
+ 0x80, 0x07, 0x00, 0x80, 0xE0, 0x00, 0x11, 0xA9,
+ 0x84, 0x82, 0x00, 0xE0, 0x8E, 0xFC, 0x04, 0x10,
+ 0xF0, 0x1C, 0x11, 0xAA, 0xF0, 0x1C, 0x11, 0xAB,
+ };
+ res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+ if (res < 0)
+ return res;
+ }
+
+ res = tas5825m_set_page(dev, 0x03);
+ if (res < 0)
+ return res;
+
+ {
+ const uint8_t values[] = {
+ 0xF0, 0x1C, 0x11, 0xAC, 0xF0, 0x1F, 0x11, 0xAD,
+ 0x86, 0xA1, 0x01, 0xC2, 0x80, 0x27, 0x80, 0xE8,
+ 0x60, 0x00, 0x00, 0x00, 0x84, 0x43, 0x03, 0x37,
+ 0x80, 0x00, 0x00, 0x81, 0x0D, 0x00, 0x10, 0x20,
+ 0x84, 0x51, 0x03, 0x3E, 0x08, 0x44, 0x26, 0x30,
+ 0x84, 0xC3, 0x03, 0x47, 0x84, 0xC2, 0x40, 0xE0,
+ 0x8C, 0xFF, 0x03, 0x23, 0xE0, 0x10, 0x11, 0xB3,
+ 0xF0, 0x1C, 0x51, 0xB4, 0xF0, 0x1C, 0x51, 0xB5,
+ 0xF0, 0x1C, 0x51, 0xB6, 0xF0, 0x1F, 0x51, 0xB7,
+ 0x86, 0xA1, 0x01, 0xC6, 0x80, 0x27, 0x80, 0xEA,
+ 0x84, 0x53, 0x03, 0x3E, 0x84, 0x82, 0x04, 0x05,
+ 0x84, 0x51, 0x03, 0x75, 0xE2, 0x6B, 0xC0, 0x00,
+ 0x80, 0x07, 0x00, 0x80, 0xE0, 0x80, 0x31, 0xB8,
+ 0x84, 0x82, 0x40, 0xE0, 0xF0, 0x1C, 0x51, 0xB9,
+ 0xF0, 0x1C, 0x51, 0xBA, 0xF0, 0x1C, 0x51, 0xBB,
+ };
+ res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+ if (res < 0)
+ return res;
+ }
+
+ res = tas5825m_set_page(dev, 0x04);
+ if (res < 0)
+ return res;
+
+ {
+ const uint8_t values[] = {
+ 0xF0, 0x1F, 0x51, 0xBC, 0x86, 0xA1, 0x01, 0xC5,
+ 0x80, 0x27, 0x80, 0xEA, 0x60, 0x00, 0x00, 0x00,
+ 0x80, 0x00, 0x00, 0x81, 0x84, 0xA1, 0x03, 0x4F,
+ 0xE0, 0x80, 0xA0, 0x00, 0x01, 0x07, 0x11, 0x20,
+ 0x08, 0x44, 0x26, 0x30, 0x08, 0x00, 0x98, 0x4A,
+ 0x84, 0x53, 0x03, 0x75, 0x08, 0x00, 0x30, 0x48,
+ 0x02, 0xCA, 0x00, 0x01, 0x08, 0x60, 0x26, 0x32,
+ 0x84, 0x51, 0x03, 0x45, 0xE4, 0x10, 0x40, 0x00,
+ 0x80, 0x40, 0xC0, 0x82, 0x84, 0xC2, 0x40, 0xE0,
+ 0x84, 0xC3, 0x03, 0x5E, 0x08, 0x00, 0x50, 0x48,
+ 0xE0, 0x10, 0x11, 0xBD, 0x02, 0xC2, 0x00, 0x02,
+ 0x08, 0x60, 0x06, 0x12, 0x84, 0xD3, 0x03, 0x4F,
+ 0xF0, 0x1C, 0x51, 0xBE, 0xF0, 0x1C, 0x51, 0xBF,
+ 0xF0, 0x1C, 0x51, 0xC0, 0xF0, 0x1F, 0x51, 0xC1,
+ 0x84, 0xA1, 0x03, 0x65, 0x80, 0x27, 0x80, 0xEA,
+ };
+ res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+ if (res < 0)
+ return res;
+ }
+
+ res = tas5825m_set_page(dev, 0x05);
+ if (res < 0)
+ return res;
+
+ {
+ const uint8_t values[] = {
+ 0xE0, 0x00, 0x00, 0x00, 0x80, 0x07, 0x00, 0x83,
+ 0x08, 0x00, 0x98, 0x6B, 0x08, 0x00, 0x30, 0x68,
+ 0x84, 0x53, 0x03, 0x45, 0x08, 0x60, 0x26, 0x33,
+ 0x84, 0x51, 0x03, 0x25, 0xE4, 0x10, 0x60, 0x00,
+ 0x80, 0x40, 0xC0, 0x81, 0x02, 0x70, 0x00, 0x7F,
+ 0x08, 0x00, 0x50, 0x28, 0x08, 0x60, 0x06, 0x11,
+ 0x84, 0xCB, 0x03, 0x65, 0xE0, 0x10, 0x51, 0xC4,
+ 0x84, 0x80, 0x41, 0x00, 0x02, 0xA3, 0x00, 0x10,
+ 0xE4, 0x00, 0x00, 0x00, 0x84, 0xD0, 0x04, 0x01,
+ 0x84, 0xA2, 0x04, 0x03, 0x84, 0xD2, 0x50, 0x01,
+ 0x84, 0x53, 0x03, 0x25, 0x80, 0x00, 0xC4, 0x04,
+ 0x8F, 0x30, 0x00, 0x00, 0x88, 0x67, 0x03, 0x00,
+ 0xE4, 0x00, 0x11, 0x9B, 0xEE, 0x64, 0x60, 0x00,
+ 0x02, 0xD3, 0x00, 0x10, 0x88, 0x47, 0x00, 0x80,
+ 0x10, 0x00, 0x18, 0x02, 0x86, 0xC1, 0x01, 0x9D,
+ };
+ res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+ if (res < 0)
+ return res;
+ }
+
+ res = tas5825m_set_page(dev, 0x06);
+ if (res < 0)
+ return res;
+
+ {
+ const uint8_t values[] = {
+ 0xE0, 0x10, 0x31, 0xC7, 0x86, 0xC9, 0x01, 0x9E,
+ 0x80, 0x00, 0xC4, 0x02, 0x02, 0x50, 0x01, 0x9C,
+ 0x00, 0xFF, 0x21, 0x65, 0x00, 0xFC, 0x00, 0x00,
+ 0x02, 0x60, 0x00, 0x01, 0x02, 0x70, 0x00, 0x04,
+ 0x84, 0xC8, 0x04, 0x10, 0x84, 0x41, 0x03, 0x67,
+ 0x84, 0x51, 0x03, 0x6D, 0x84, 0xC0, 0x04, 0x02,
+ 0x04, 0x80, 0x91, 0x20, 0x08, 0x60, 0x26, 0x30,
+ 0x02, 0x78, 0x00, 0x03, 0x02, 0x68, 0x00, 0x02,
+ 0x0D, 0x00, 0x10, 0x10, 0x08, 0x60, 0x06, 0x12,
+ 0x84, 0x49, 0x03, 0x2F, 0xE0, 0x80, 0x71, 0xA9,
+ 0x02, 0x28, 0x03, 0x55, 0x84, 0x82, 0x00, 0xE0,
+ 0x84, 0x2A, 0x04, 0x00, 0xF0, 0x1C, 0x11, 0xAA,
+ 0xF0, 0x1C, 0x11, 0xAB, 0xF0, 0x1C, 0x11, 0xAC,
+ 0xF0, 0x1F, 0x11, 0xAD, 0x86, 0xA1, 0x01, 0xAE,
+ 0x80, 0x27, 0x80, 0xE8, 0x84, 0x82, 0x04, 0x07,
+ };
+ res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+ if (res < 0)
+ return res;
+ }
+
+ res = tas5825m_set_page(dev, 0x07);
+ if (res < 0)
+ return res;
+
+ {
+ const uint8_t values[] = {
+ 0xE0, 0x80, 0x60, 0x00, 0x84, 0x82, 0x40, 0xE0,
+ 0x84, 0x43, 0x03, 0x67, 0xF0, 0x1C, 0x51, 0xAF,
+ 0xF0, 0x1C, 0x51, 0xB0, 0xF0, 0x1C, 0x51, 0xB1,
+ 0xF0, 0x1F, 0x51, 0xB2, 0x02, 0x78, 0x00, 0x05,
+ 0x80, 0x27, 0x80, 0xEA, 0x84, 0x82, 0x04, 0x08,
+ 0x02, 0x70, 0x00, 0x06, 0x84, 0x53, 0x03, 0x6D,
+ 0x84, 0x80, 0x04, 0x07, 0xE0, 0x00, 0x00, 0x82,
+ 0xF0, 0x81, 0x00, 0x80, 0x80, 0x07, 0x12, 0xBC,
+ 0x86, 0xA1, 0x01, 0x9F, 0xE2, 0x57, 0xA0, 0x00,
+ 0x84, 0x82, 0x04, 0x09, 0x84, 0x82, 0x20, 0xE0,
+ 0xF0, 0x1C, 0x31, 0xA0, 0xF0, 0x1C, 0x31, 0xA1,
+ 0xF0, 0x1C, 0x31, 0xA2, 0xF0, 0x1F, 0x31, 0xA3,
+ 0xE4, 0x00, 0x11, 0xA6, 0x80, 0x27, 0x80, 0xE1,
+ 0xF4, 0x00, 0x11, 0xA4, 0xF4, 0x1D, 0x31, 0xA5,
+ 0xF4, 0x1C, 0x31, 0xA7, 0xF4, 0x1F, 0x31, 0xA8,
+ };
+ res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+ if (res < 0)
+ return res;
+ }
+
+ res = tas5825m_set_page(dev, 0x08);
+ if (res < 0)
+ return res;
+
+ {
+ const uint8_t values[] = {
+ 0x02, 0x78, 0x00, 0x03, 0xE2, 0x6A, 0xF1, 0xC3,
+ 0x80, 0x67, 0x80, 0xE9, 0x84, 0x4B, 0x03, 0x2F,
+ 0x02, 0x70, 0x00, 0x04, 0x84, 0x59, 0x03, 0x3D,
+ 0x80, 0x07, 0x00, 0x80, 0xE0, 0x00, 0x11, 0xA9,
+ 0x84, 0x82, 0x60, 0xE0, 0x8E, 0xFC, 0x04, 0x10,
+ 0xF0, 0x1C, 0x71, 0xAA, 0xF0, 0x1C, 0x71, 0xAB,
+ 0xF0, 0x1C, 0x71, 0xAC, 0xF0, 0x1F, 0x71, 0xAD,
+ 0x86, 0xA1, 0x01, 0xC2, 0x80, 0x27, 0x80, 0xEB,
+ 0x60, 0x00, 0x00, 0x00, 0x84, 0x5B, 0x03, 0x3D,
+ 0x80, 0x00, 0x00, 0x81, 0x0D, 0x00, 0x10, 0x20,
+ 0x84, 0x59, 0x03, 0x3F, 0x08, 0x44, 0x26, 0x30,
+ 0x84, 0xC3, 0x03, 0x57, 0x84, 0xC2, 0x60, 0xE0,
+ 0xE0, 0x10, 0x11, 0xB3, 0xF0, 0x1C, 0x71, 0xB4,
+ 0xF0, 0x1C, 0x71, 0xB5, 0xF0, 0x1C, 0x71, 0xB6,
+ 0xF0, 0x1F, 0x71, 0xB7, 0x86, 0xA1, 0x01, 0xC6,
+ };
+ res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+ if (res < 0)
+ return res;
+ }
+
+ res = tas5825m_set_page(dev, 0x09);
+ if (res < 0)
+ return res;
+
+ {
+ const uint8_t values[] = {
+ 0x80, 0x27, 0x80, 0xEB, 0x84, 0x5B, 0x03, 0x3F,
+ 0x84, 0x82, 0x04, 0x0D, 0x84, 0x41, 0x03, 0x76,
+ 0xE2, 0x6B, 0xE0, 0x00, 0x80, 0x07, 0x00, 0x80,
+ 0xE0, 0x81, 0x31, 0xB8, 0x84, 0x82, 0x00, 0xE0,
+ 0xF0, 0x1C, 0x11, 0xB9, 0xF0, 0x1C, 0x11, 0xBA,
+ 0xF0, 0x1C, 0x11, 0xBB, 0xF0, 0x1F, 0x11, 0xBC,
+ 0x86, 0xA1, 0x01, 0xC5, 0x80, 0x27, 0x80, 0xE8,
+ 0x60, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x81,
+ 0x84, 0xA1, 0x03, 0x5D, 0xE0, 0x81, 0xA0, 0x00,
+ 0x01, 0x07, 0x11, 0x20, 0x08, 0x44, 0x26, 0x30,
+ 0x08, 0x00, 0x98, 0x4A, 0x84, 0x43, 0x03, 0x76,
+ 0x08, 0x00, 0x30, 0x48, 0x02, 0xCA, 0x00, 0x01,
+ 0x08, 0x60, 0x26, 0x32, 0x84, 0x41, 0x03, 0x46,
+ 0xE4, 0x10, 0x40, 0x00, 0x80, 0x40, 0xC0, 0x82,
+ 0x84, 0xC2, 0x00, 0xE0, 0x84, 0xC3, 0x03, 0x5F,
+ };
+ res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+ if (res < 0)
+ return res;
+ }
+
+ res = tas5825m_set_page(dev, 0x0A);
+ if (res < 0)
+ return res;
+
+ {
+ const uint8_t values[] = {
+ 0x08, 0x00, 0x50, 0x48, 0xE0, 0x10, 0x11, 0xBD,
+ 0x02, 0xC2, 0x00, 0x02, 0x08, 0x60, 0x06, 0x12,
+ 0x84, 0xD3, 0x03, 0x5D, 0xF0, 0x1C, 0x11, 0xBE,
+ 0xF0, 0x1C, 0x11, 0xBF, 0xF0, 0x1C, 0x11, 0xC0,
+ 0xF0, 0x1F, 0x11, 0xC1, 0x84, 0xA1, 0x03, 0x66,
+ 0x80, 0x27, 0x80, 0xE8, 0xE0, 0x00, 0x00, 0x00,
+ 0x80, 0x07, 0x00, 0x83, 0x08, 0x00, 0x98, 0x6B,
+ 0x08, 0x00, 0x30, 0x68, 0x84, 0x43, 0x03, 0x46,
+ 0x08, 0x60, 0x26, 0x33, 0x84, 0x51, 0x03, 0x26,
+ 0xE4, 0x10, 0x60, 0x00, 0x80, 0x40, 0xC0, 0x81,
+ 0x02, 0x70, 0x00, 0x7F, 0x08, 0x00, 0x50, 0x28,
+ 0x08, 0x60, 0x06, 0x11, 0x8C, 0xFF, 0x03, 0x24,
+ 0x84, 0xCB, 0x03, 0x66, 0xE0, 0x10, 0x51, 0xC4,
+ 0x84, 0x80, 0x41, 0x00, 0x02, 0xA3, 0x00, 0x10,
+ 0xE4, 0x00, 0x00, 0x00, 0x84, 0xD0, 0x04, 0x09,
+ };
+ res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+ if (res < 0)
+ return res;
+ }
+
+ res = tas5825m_set_page(dev, 0x0B);
+ if (res < 0)
+ return res;
+
+ {
+ const uint8_t values[] = {
+ 0x84, 0xA2, 0x04, 0x0B, 0x84, 0xD2, 0x50, 0x01,
+ 0x84, 0x53, 0x03, 0x26, 0x80, 0x00, 0xC4, 0x0C,
+ 0x8F, 0x30, 0x00, 0x00, 0x88, 0x67, 0x03, 0x00,
+ 0xE4, 0x00, 0x11, 0x9B, 0xEE, 0x64, 0x80, 0x00,
+ 0x02, 0xD3, 0x00, 0x10, 0x88, 0x47, 0x00, 0x80,
+ 0x10, 0x00, 0x18, 0x02, 0x86, 0xC1, 0x01, 0x9D,
+ 0xE0, 0x10, 0x31, 0xC7, 0x86, 0xC9, 0x01, 0x9E,
+ 0x80, 0x00, 0xC4, 0x0A, 0x02, 0x50, 0x01, 0x9C,
+ 0x00, 0xFF, 0x21, 0x65, 0x00, 0xFC, 0x00, 0x00,
+ 0x02, 0x70, 0x00, 0x04, 0x02, 0x68, 0x00, 0x01,
+ 0x02, 0x60, 0x00, 0x03, 0x02, 0x78, 0x00, 0x02,
+ 0x84, 0x49, 0x03, 0x6E, 0x84, 0x41, 0x03, 0x6F,
+ 0x84, 0xC8, 0x04, 0x10, 0x84, 0xC0, 0x04, 0x0A,
+ 0x04, 0x81, 0x91, 0x20, 0x08, 0x60, 0x26, 0x30,
+ 0x0D, 0x00, 0x10, 0x10, 0x08, 0x60, 0x06, 0x12,
+ };
+ res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+ if (res < 0)
+ return res;
+ }
+
+ res = tas5825m_set_page(dev, 0x0C);
+ if (res < 0)
+ return res;
+
+ {
+ const uint8_t values[] = {
+ 0x84, 0x00, 0x04, 0x06, 0xE0, 0x81, 0x71, 0xA9,
+ 0x84, 0x82, 0x20, 0xE8, 0xF0, 0x1D, 0x31, 0xAA,
+ 0xF0, 0x1D, 0x31, 0xAB, 0xF0, 0x1D, 0x31, 0xAC,
+ 0xF0, 0x1C, 0x31, 0xAD, 0x86, 0xA1, 0x01, 0xAE,
+ 0x80, 0x27, 0x80, 0xF9, 0x84, 0x82, 0x04, 0x0E,
+ 0xE0, 0x81, 0x60, 0x00, 0x84, 0x82, 0x00, 0xE8,
+ 0x84, 0x4B, 0x03, 0x6E, 0xF0, 0x1D, 0x11, 0xAF,
+ 0xF0, 0x1D, 0x11, 0xB0, 0xF0, 0x1D, 0x11, 0xB1,
+ 0xF0, 0x1C, 0x11, 0xB2, 0x02, 0xA3, 0x00, 0x1A,
+ 0x80, 0x27, 0x80, 0xF8, 0x84, 0x82, 0x04, 0x0F,
+ 0xE0, 0x81, 0xC0, 0x00, 0xF0, 0x81, 0xE0, 0x80,
+ 0x84, 0x43, 0x03, 0x6F, 0x80, 0x07, 0x12, 0xBD,
+ 0x02, 0xC0, 0x00, 0x00, 0x00, 0xFC, 0x50, 0x00,
+ 0x8F, 0x00, 0x00, 0x11, 0x8F, 0x00, 0xFF, 0xFF,
+ 0x84, 0x58, 0x04, 0x01, 0x84, 0xC2, 0x04, 0x00,
+ };
+ res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+ if (res < 0)
+ return res;
+ }
+
+ res = tas5825m_set_page(dev, 0x0D);
+ if (res < 0)
+ return res;
+
+ {
+ const uint8_t values[] = {
+ 0x02, 0xC2, 0x60, 0x00, 0x84, 0xA0, 0x61, 0x00,
+ 0xE0, 0x20, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x00,
+ 0x40, 0x40, 0xA0, 0x00, 0x80, 0x00, 0xC0, 0x82,
+ 0x08, 0xFC, 0x48, 0x3A, 0x08, 0xFC, 0x18, 0x50,
+ 0x00, 0xFC, 0x00, 0x00, 0xE0, 0x10, 0x00, 0x00,
+ 0x86, 0xA0, 0x41, 0x00, 0x40, 0x47, 0x20, 0x00,
+ 0x80, 0x00, 0xC0, 0x83, 0x04, 0xE0, 0x3D, 0x1E,
+ 0x04, 0x80, 0x11, 0xE0, 0x08, 0x44, 0x26, 0x33,
+ 0x02, 0xCB, 0x00, 0x10, 0xE0, 0x10, 0x40, 0x83,
+ 0x08, 0x00, 0x28, 0x21, 0x84, 0xCA, 0x61, 0x00,
+ 0x80, 0x07, 0x00, 0x81, 0x0C, 0xE0, 0x2C, 0x09,
+ 0x84, 0xCA, 0x21, 0x00, 0x00, 0xFC, 0x50, 0x00,
+ 0x8F, 0x00, 0x00, 0x01
+ };
+ res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+ if (res < 0)
+ return res;
+ }
+
+ res = tas5825m_set_book(dev, 0x78);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_set_page(dev, 0x18);
+ if (res < 0)
+ return res;
+
+ {
+ const uint8_t values[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00
+ };
+ res = tas5825m_write_block_at(dev, 0x30, values, ARRAY_SIZE(values));
+ if (res < 0)
+ return res;
+ }
+
+ res = tas5825m_set_book(dev, 0x78);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_set_page(dev, 0x1B);
+ if (res < 0)
+ return res;
+
+ {
+ const uint8_t values[] = {
+ 0x00, 0x00, 0x03, 0x80, 0x00, 0x00, 0x04, 0x00,
+ 0x00, 0x00, 0x03, 0x28, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00
+ };
+ res = tas5825m_write_block_at(dev, 0x6C, values, ARRAY_SIZE(values));
+ if (res < 0)
+ return res;
+ }
+
+ res = tas5825m_set_page(dev, 0x1C);
+ if (res < 0)
+ return res;
+
+ {
+ const uint8_t values[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00
+ };
+ res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+ if (res < 0)
+ return res;
+ }
+
+ res = tas5825m_set_book(dev, 0x78);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_set_page(dev, 0x1C);
+ if (res < 0)
+ return res;
+
+ {
+ const uint8_t values[] = {
+ 0x00, 0x00, 0x03, 0x30, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ };
+ res = tas5825m_write_block_at(dev, 0x1C, values, ARRAY_SIZE(values));
+ if (res < 0)
+ return res;
+ }
+
+ res = tas5825m_set_book(dev, 0x78);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_set_page(dev, 0x1C);
+ if (res < 0)
+ return res;
+
+ {
+ const uint8_t values[] = {
+ 0x00, 0x00, 0x03, 0x38, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ };
+ res = tas5825m_write_block_at(dev, 0x3C, values, ARRAY_SIZE(values));
+ if (res < 0)
+ return res;
+ }
+
+ res = tas5825m_set_book(dev, 0x78);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_set_page(dev, 0x1C);
+ if (res < 0)
+ return res;
+
+ {
+ const uint8_t values[] = {
+ 0x00, 0x00, 0x03, 0x40, 0x00, 0x00, 0x03, 0x48,
+ 0x00, 0x00, 0x03, 0x50, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ };
+ res = tas5825m_write_block_at(dev, 0x54, values, ARRAY_SIZE(values));
+ if (res < 0)
+ return res;
+ }
+
+ res = tas5825m_set_book(dev, 0x78);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_set_page(dev, 0x1C);
+ if (res < 0)
+ return res;
+
+ {
+ const uint8_t values[] = {
+ 0x00, 0x00, 0x03, 0x58, 0x00, 0x00, 0x03, 0x60,
+ 0x00, 0x00, 0x00, 0x00
+ };
+ res = tas5825m_write_block_at(dev, 0x74, values, ARRAY_SIZE(values));
+ if (res < 0)
+ return res;
+ }
+
+ res = tas5825m_set_page(dev, 0x1D);
+ if (res < 0)
+ return res;
+
+ {
+ const uint8_t values[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00
+ };
+ res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+ if (res < 0)
+ return res;
+ }
+
+ res = tas5825m_set_book(dev, 0x78);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_set_page(dev, 0x1D);
+ if (res < 0)
+ return res;
+
+ {
+ const uint8_t values[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ };
+ res = tas5825m_write_block_at(dev, 0x1C, values, ARRAY_SIZE(values));
+ if (res < 0)
+ return res;
+ }
+
+ res = tas5825m_set_book(dev, 0x78);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_set_page(dev, 0x1D);
+ if (res < 0)
+ return res;
+
+ {
+ const uint8_t values[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00
+ };
+ res = tas5825m_write_block_at(dev, 0x3C, values, ARRAY_SIZE(values));
+ if (res < 0)
+ return res;
+ }
+
+ res = tas5825m_set_page(dev, 0x1E);
+ if (res < 0)
+ return res;
+
+ {
+ const uint8_t values[] = {
+ 0x00, 0x00, 0x00, 0x00
+ };
+ res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+ if (res < 0)
+ return res;
+ }
+
+ res = tas5825m_set_book(dev, 0x78);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_set_page(dev, 0x1E);
+ if (res < 0)
+ return res;
+
+ {
+ const uint8_t values[] = {
+ 0x00, 0x00, 0x03, 0x68, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ };
+ res = tas5825m_write_block_at(dev, 0x0C, values, ARRAY_SIZE(values));
+ if (res < 0)
+ return res;
+ }
+
+ res = tas5825m_set_book(dev, 0x78);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_set_page(dev, 0x1E);
+ if (res < 0)
+ return res;
+
+ {
+ const uint8_t values[] = {
+ 0x00, 0x00, 0x03, 0x70, 0x00, 0x00, 0x03, 0x78,
+ 0x00, 0x00, 0x04, 0x80, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ };
+ res = tas5825m_write_block_at(dev, 0x24, values, ARRAY_SIZE(values));
+ if (res < 0)
+ return res;
+ }
+
+ res = tas5825m_set_book(dev, 0x78);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_set_page(dev, 0x1E);
+ if (res < 0)
+ return res;
+
+ {
+ const uint8_t values[] = {
+ 0x00, 0x00, 0x04, 0x88, 0x00, 0x00, 0x04, 0x90,
+ };
+ res = tas5825m_write_block_at(dev, 0x44, values, ARRAY_SIZE(values));
+ if (res < 0)
+ return res;
+ }
+
+ res = tas5825m_set_book(dev, 0x8C);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_set_page(dev, 0x0E);
+ if (res < 0)
+ return res;
+
+ {
+ const uint8_t values[] = {
+ 0x00, 0xA7, 0x26, 0x4A, 0x7F, 0xFF, 0xFF, 0xFF,
+ 0x00, 0x20, 0xC4, 0x9C, 0x00, 0x20, 0xC4, 0x9C,
+ 0x00, 0x00, 0x68, 0xDB, 0x00, 0x00, 0xD1, 0xB7,
+ 0x00, 0x00, 0x68, 0xDB, 0x0F, 0xA4, 0xA8, 0xC1,
+ 0xF8, 0x59, 0x7F, 0x63
+ };
+ res = tas5825m_write_block_at(dev, 0x5C, values, ARRAY_SIZE(values));
+ if (res < 0)
+ return res;
+ }
+
+ res = tas5825m_set_page(dev, 0x0F);
+ if (res < 0)
+ return res;
+
+ {
+ const uint8_t values[] = {
+ 0x07, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x2F, 0xB7, 0xE9,
+ 0x00, 0x5F, 0x6F, 0xD2, 0x00, 0x2F, 0xB7, 0xE9,
+ 0x0B, 0x1E, 0x4F, 0x76, 0xFC, 0x23, 0x05, 0x54,
+ 0xFA, 0x41, 0x20, 0x5C, 0x0B, 0x7D, 0xBF, 0x48,
+ 0xFA, 0x41, 0x20, 0x5C, 0x0B, 0x1E, 0x4F, 0x76,
+ 0xFC, 0x23, 0x05, 0x54, 0x00, 0x04, 0x81, 0x6F,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x0F, 0x3F, 0xE5, 0xC9, 0xF8, 0xBB, 0x98, 0xC8,
+ 0x07, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x81, 0x6F,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x0F, 0x3F, 0xE5, 0xC9, 0xF8, 0xBB, 0x98, 0xC8,
+ };
+ res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+ if (res < 0)
+ return res;
+ }
+
+ res = tas5825m_set_page(dev, 0x10);
+ if (res < 0)
+ return res;
+
+ {
+ const uint8_t values[] = {
+ 0x00, 0x89, 0xA0, 0x27, 0x7F, 0xEC, 0x56, 0xD5,
+ 0x7F, 0xFC, 0xB9, 0x23, 0x00, 0x89, 0xA0, 0x27,
+ 0x7F, 0xEC, 0x56, 0xD5, 0x7F, 0xFC, 0xB9, 0x23,
+ };
+ res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+ if (res < 0)
+ return res;
+ }
+
+ res = tas5825m_set_book(dev, 0x00);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_write_at(dev, 0x40, 0x00);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_set_book(dev, 0x00);
+ if (res < 0)
+ return res;
+
+ {
+ const uint8_t values[] = {
+ 0x11, 0xFF
+ };
+ res = tas5825m_write_block_at(dev, 0x7D, values, ARRAY_SIZE(values));
+ if (res < 0)
+ return res;
+ }
+
+ res = tas5825m_set_page(dev, 0x01);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_write_at(dev, 0x51, 0x05);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_set_page(dev, 0x02);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_write_at(dev, 0x19, 0xDF);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_set_book(dev, 0x8C);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_set_page(dev, 0x01);
+ if (res < 0)
+ return res;
+
+ {
+ const uint8_t values[] = {
+ 0x00, 0x71, 0x94, 0x9A
+ };
+ res = tas5825m_write_block_at(dev, 0x2C, values, ARRAY_SIZE(values));
+ if (res < 0)
+ return res;
+ }
+
+ res = tas5825m_set_page(dev, 0x0A);
+ if (res < 0)
+ return res;
+
+ {
+ const uint8_t values[] = {
+ 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00,
+ 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00
+ };
+ res = tas5825m_write_block_at(dev, 0x64, values, ARRAY_SIZE(values));
+ if (res < 0)
+ return res;
+ }
+
+ res = tas5825m_set_page(dev, 0x0B);
+ if (res < 0)
+ return res;
+
+ {
+ const uint8_t values[] = {
+ 0x00, 0x80, 0x00, 0x00, 0x00, 0x2D, 0x6A, 0x86,
+ 0x00, 0x2D, 0x6A, 0x86, 0x00, 0x80, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x80, 0x00, 0x00
+ };
+ res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+ if (res < 0)
+ return res;
+ }
+
+ {
+ const uint8_t values[] = {
+ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x57, 0x62, 0x00, 0x00, 0x00, 0x00,
+ };
+ res = tas5825m_write_block_at(dev, 0x28, values, ARRAY_SIZE(values));
+ if (res < 0)
+ return res;
+ }
+
+ res = tas5825m_set_page(dev, 0x0E);
+ if (res < 0)
+ return res;
+
+ {
+ const uint8_t values[] = {
+ 0x00, 0x03, 0x69, 0xC5, 0x00, 0xDE, 0x71, 0xB1,
+ 0x00, 0x22, 0x1D, 0x95, 0x00, 0x03, 0x69, 0xC5,
+ };
+ res = tas5825m_write_block_at(dev, 0x5C, values, ARRAY_SIZE(values));
+ if (res < 0)
+ return res;
+ }
+
+ res = tas5825m_set_page(dev, 0x0F);
+ if (res < 0)
+ return res;
+
+ {
+ const uint8_t values[] = {
+ 0x7F, 0xF9, 0x2C, 0x60, 0x02, 0x81, 0xE8, 0x8F,
+ };
+ res = tas5825m_write_block_at(dev, 0x5C, values, ARRAY_SIZE(values));
+ if (res < 0)
+ return res;
+ }
+
+ res = tas5825m_set_page(dev, 0x07);
+ if (res < 0)
+ return res;
+
+ {
+ const uint8_t values[] = {
+ 0x00, 0x80, 0x00, 0x00
+ };
+ res = tas5825m_write_block_at(dev, 0x64, values, ARRAY_SIZE(values));
+ if (res < 0)
+ return res;
+ }
+
+ {
+ const uint8_t values[] = {
+ 0x40, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00,
+ };
+ res = tas5825m_write_block_at(dev, 0x6C, values, ARRAY_SIZE(values));
+ if (res < 0)
+ return res;
+ }
+
+ res = tas5825m_set_book(dev, 0xAA);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_set_page(dev, 0x01);
+ if (res < 0)
+ return res;
+
+ {
+ const uint8_t values[] = {
+ 0x07, 0xF5, 0xD6, 0xD3, 0xF0, 0x63, 0x93, 0xB0,
+ 0x07, 0xA7, 0x5A, 0xBD, 0x0F, 0x9C, 0x6C, 0x50,
+ 0xF8, 0x62, 0xCE, 0x70, 0x07, 0xF4, 0x31, 0x72,
+ 0xF0, 0x73, 0x27, 0x53, 0x07, 0x98, 0xFE, 0x8B,
+ 0x0F, 0x8C, 0xD8, 0xAD, 0xF8, 0x72, 0xD0, 0x02,
+ 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ };
+ res = tas5825m_write_block_at(dev, 0x30, values, ARRAY_SIZE(values));
+ if (res < 0)
+ return res;
+ }
+
+ res = tas5825m_set_page(dev, 0x02);
+ if (res < 0)
+ return res;
+
+ {
+ const uint8_t values[] = {
+ 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ };
+ res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+ if (res < 0)
+ return res;
+ }
+
+ res = tas5825m_set_page(dev, 0x03);
+ if (res < 0)
+ return res;
+
+ {
+ const uint8_t values[] = {
+ 0x07, 0xE3, 0xCF, 0xE3, 0xF0, 0x38, 0x60, 0x3B,
+ 0x07, 0xE3, 0xCF, 0xE3, 0x0F, 0xC7, 0x6A, 0x36,
+ 0xF8, 0x38, 0x2A, 0xAB, 0x07, 0xEB, 0x43, 0x17,
+ 0xF0, 0x29, 0x79, 0xD3, 0x07, 0xEB, 0x43, 0x17,
+ 0x0F, 0xD6, 0x50, 0x6B, 0xF8, 0x29, 0x44, 0x10,
+ 0x07, 0xF0, 0xED, 0x8D, 0xF0, 0x42, 0x66, 0x35,
+ 0x07, 0xCD, 0xBB, 0x6F, 0x0F, 0xBD, 0x99, 0xCB,
+ 0xF8, 0x41, 0x57, 0x04, 0x08, 0x19, 0xA4, 0x18,
+ 0xF0, 0x0F, 0xF2, 0xD6, 0x07, 0xD7, 0x7B, 0xA8,
+ 0x0F, 0xF0, 0x60, 0x5B, 0xF8, 0x0F, 0x33, 0x70,
+ 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ };
+ res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+ if (res < 0)
+ return res;
+ }
+
+ res = tas5825m_set_page(dev, 0x04);
+ if (res < 0)
+ return res;
+
+ {
+ const uint8_t values[] = {
+ 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ };
+ res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+ if (res < 0)
+ return res;
+ }
+
+ res = tas5825m_set_page(dev, 0x05);
+ if (res < 0)
+ return res;
+
+ {
+ const uint8_t values[] = {
+ 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x07, 0xE3, 0xCF, 0xE3,
+ 0xF0, 0x38, 0x60, 0x3B, 0x07, 0xE3, 0xCF, 0xE3,
+ 0x0F, 0xC7, 0x6A, 0x36, 0xF8, 0x38, 0x2A, 0xAB,
+ 0x07, 0xEB, 0x43, 0x17, 0xF0, 0x29, 0x79, 0xD3,
+ 0x07, 0xEB, 0x43, 0x17, 0x0F, 0xD6, 0x50, 0x6B,
+ 0xF8, 0x29, 0x44, 0x10, 0x07, 0xF0, 0xED, 0x8D,
+ 0xF0, 0x42, 0x66, 0x35, 0x07, 0xCD, 0xBB, 0x6F,
+ 0x0F, 0xBD, 0x99, 0xCB, 0xF8, 0x41, 0x57, 0x04,
+ };
+ res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+ if (res < 0)
+ return res;
+ }
+
+ res = tas5825m_set_page(dev, 0x06);
+ if (res < 0)
+ return res;
+
+ {
+ const uint8_t values[] = {
+ 0x08, 0x19, 0xA4, 0x18, 0xF0, 0x0F, 0xF2, 0xD6,
+ 0x07, 0xD7, 0x7B, 0xA8, 0x0F, 0xF0, 0x60, 0x5B,
+ 0xF8, 0x0F, 0x33, 0x70, 0x08, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ };
+ res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+ if (res < 0)
+ return res;
+ }
+
+ res = tas5825m_set_page(dev, 0x0E);
+ if (res < 0)
+ return res;
+
+ {
+ const uint8_t values[] = {
+ 0x00, 0x87, 0x5E, 0xC2, 0xFF, 0x02, 0xC8, 0x72,
+ 0x00, 0x76, 0xEA, 0x00, 0x0F, 0xDB, 0x79, 0xE0,
+ 0xF8, 0x23, 0x74, 0xEC
+ };
+ res = tas5825m_write_block_at(dev, 0x6C, values, ARRAY_SIZE(values));
+ if (res < 0)
+ return res;
+ }
+
+ res = tas5825m_set_page(dev, 0x0F);
+ if (res < 0)
+ return res;
+
+ {
+ const uint8_t values[] = {
+ 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0xFF, 0xF4, 0x49, 0x81,
+ 0xFF, 0xE8, 0x93, 0x02, 0xFF, 0xF4, 0x49, 0x81,
+ 0x0D, 0x94, 0x7A, 0x64, 0xFA, 0x3C, 0xAB, 0xA1,
+ 0x06, 0xD5, 0xF3, 0xB1, 0xF2, 0x54, 0x18, 0x9F,
+ 0x06, 0xD5, 0xF3, 0xB1, 0x0D, 0x94, 0x7A, 0x64,
+ 0xFA, 0x3C, 0xAB, 0xA1, 0x00, 0x00, 0x38, 0xE4,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x0F, 0xD5, 0x55, 0x55, 0xF8, 0x2A, 0x71, 0xC7,
+ };
+ res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
+ if (res < 0)
+ return res;
+ }
+
+ res = tas5825m_set_book(dev, 0x00);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_write_at(dev, 0x30, 0x00);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_write_at(dev, 0x60, 0x02);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_write_at(dev, 0x62, 0x09);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_write_at(dev, 0x4C, 0x30);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_set_book(dev, 0x00);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_write_at(dev, 0x4E, 0xBB);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_write_at(dev, 0x4F, 0xB0);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_set_book(dev, 0x00);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_write_at(dev, 0x03, 0x0F);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_set_page(dev, 0x00);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_set_page(dev, 0x00);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_set_page(dev, 0x00);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_set_book(dev, 0x00);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_set_page(dev, 0x00);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_write_at(dev, 0x78, 0x80);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_write_at(dev, 0x02, 0x01);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_write_at(dev, 0x6B, 0x03);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_write_at(dev, 0x6C, 0x03);
+ if (res < 0)
+ return res;
+
+ res = tas5825m_write_at(dev, 0x03, 0x03);
+ if (res < 0)
+ return res;
+
+ return 0;
+}