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/*
* This file is part of the coreboot project.
*
* Copyright (C) 2017 Siemens AG
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef MC_BDX1_GPIO_H_
#define MC_BDX1_GPIO_H_
#include <soc/gpio.h>
static const struct gpio_config mc_bdx1_gpio_config[] = {
PCH_GPIO_OUT_LOW(0),
PCH_GPIO_OUT_LOW(1),
PCH_GPIO_INPUT(2),
PCH_GPIO_INPUT(3),
PCH_GPIO_INPUT(4),
PCH_GPIO_INPUT(5),
PCH_GPIO_OUT_LOW(6),
PCH_GPIO_INPUT_INVERT(7),
PCH_GPIO_OUT_LOW(8),
PCH_GPIO_NATIVE(9),
PCH_GPIO_NATIVE(10),
PCH_GPIO_NATIVE(11),
PCH_GPIO_INPUT(12),
PCH_GPIO_NATIVE(14),
PCH_GPIO_INPUT_INVERT(15),
PCH_GPIO_OUT_LOW(16),
PCH_GPIO_NATIVE(17),
PCH_GPIO_OUT_HIGH(18),
PCH_GPIO_NATIVE(19),
PCH_GPIO_NATIVE(20),
PCH_GPIO_NATIVE(21),
PCH_GPIO_NATIVE(22),
PCH_GPIO_NATIVE(23),
PCH_GPIO_INPUT(24),
PCH_GPIO_OUT_HIGH(25),
PCH_GPIO_NATIVE(26),
PCH_GPIO_INPUT(27),
PCH_GPIO_OUT_HIGH(28),
PCH_GPIO_OUT_HIGH(29),
PCH_GPIO_NATIVE(30),
PCH_GPIO_INPUT(31),
PCH_GPIO_NATIVE(32),
PCH_GPIO_NATIVE(33),
PCH_GPIO_OUT_HIGH(35),
PCH_GPIO_NATIVE(36),
PCH_GPIO_NATIVE(37),
PCH_GPIO_NATIVE(38),
PCH_GPIO_NATIVE(39),
PCH_GPIO_INPUT(40),
PCH_GPIO_INPUT(41),
PCH_GPIO_INPUT(42),
PCH_GPIO_NATIVE(43),
PCH_GPIO_NATIVE(44),
PCH_GPIO_NATIVE(45),
PCH_GPIO_NATIVE(46),
PCH_GPIO_NATIVE(48),
PCH_GPIO_INPUT(49),
PCH_GPIO_NATIVE(50),
PCH_GPIO_NATIVE(51),
PCH_GPIO_NATIVE(52),
PCH_GPIO_NATIVE(53),
PCH_GPIO_NATIVE(54),
PCH_GPIO_NATIVE(55),
PCH_GPIO_NATIVE(57),
PCH_GPIO_NATIVE(58),
PCH_GPIO_NATIVE(59),
PCH_GPIO_NATIVE(60),
PCH_GPIO_NATIVE(61),
PCH_GPIO_NATIVE(62),
PCH_GPIO_NATIVE(65),
PCH_GPIO_OUT_LOW(67),
PCH_GPIO_NATIVE(68),
PCH_GPIO_NATIVE(69),
PCH_GPIO_NATIVE(70),
PCH_GPIO_NATIVE(71),
PCH_GPIO_INPUT(72),
PCH_GPIO_NATIVE(74),
PCH_GPIO_NATIVE(75),
PCH_GPIO_END
};
#endif /* MC_BDX1_GPIO_H_ */