Michał Kopeć | 214da6b | 2019-10-13 22:32:24 +0200 | [diff] [blame] | 1 | |
| 2 | coreboot-4.10-967-g6e66d7b8eb Thu Oct 10 14:06:09 UTC 2019 romstage starting (log level: 6)... |
| 3 | Setting up static northbridge registers... done |
| 4 | Initializing Graphics... |
| 5 | FMAP: Found "FLASH" version 1.1 at 610000. |
| 6 | FMAP: base = ff400000 size = c00000 #areas = 4 |
| 7 | FMAP: area COREBOOT found @ 610200 (6225408 bytes) |
| 8 | CBFS: Locating 'cmos_layout.bin' |
| 9 | CBFS: Found @ offset 31b40 size 79c |
| 10 | Back from systemagent_early_init() |
| 11 | POST: 0x38 |
| 12 | Hybrid graphics: No discrete GPU present. |
| 13 | SMBus controller enabled. |
| 14 | POST: 0x39 |
| 15 | POST: 0x3a |
| 16 | Intel ME early init |
| 17 | Intel ME firmware is ready |
| 18 | ME: Requested 32MB UMA |
| 19 | Starting native Platform init |
| 20 | DMI: Running at X4 @ 5000MT/s |
| 21 | FMAP: area RW_MRC_CACHE found @ 600000 (65536 bytes) |
| 22 | Trying stored timings. |
| 23 | Starting Ivybridge RAM training (1). |
| 24 | 100MHz reference clock support: yes |
| 25 | Trying CAS 11, tCK 320. |
| 26 | Found compatible clock, CAS pair. |
| 27 | Selected DRAM frequency: 800 MHz |
| 28 | Selected CAS latency : 11T |
| 29 | PLL busy... done in 10 us |
| 30 | MCU frequency is set at : 800 MHz |
| 31 | Done dimm mapping |
| 32 | Update PCI-E configuration space: |
| 33 | PCI(0, 0, 0)[a0] = 0 |
| 34 | PCI(0, 0, 0)[a4] = 2 |
| 35 | PCI(0, 0, 0)[bc] = 82a00000 |
| 36 | PCI(0, 0, 0)[a8] = 7b600000 |
| 37 | PCI(0, 0, 0)[ac] = 2 |
| 38 | PCI(0, 0, 0)[b8] = 80000000 |
| 39 | PCI(0, 0, 0)[b0] = 80a00000 |
| 40 | PCI(0, 0, 0)[b4] = 80800000 |
| 41 | PCI(0, 0, 0)[7c] = 7f |
| 42 | PCI(0, 0, 0)[70] = fe000000 |
| 43 | PCI(0, 0, 0)[74] = 1 |
| 44 | PCI(0, 0, 0)[78] = fe000c00 |
| 45 | Done memory map |
| 46 | Done io registers |
| 47 | t123: 1767, 6000, 7620 |
| 48 | ME: FWS2: 0x101f012e |
| 49 | ME: Bist in progress: 0x0 |
| 50 | ME: ICC Status : 0x3 |
| 51 | ME: Invoke MEBx : 0x1 |
| 52 | ME: CPU replaced : 0x0 |
| 53 | ME: MBP ready : 0x1 |
| 54 | ME: MFS failure : 0x0 |
| 55 | ME: Warm reset req : 0x0 |
| 56 | ME: CPU repl valid : 0x1 |
| 57 | ME: (Reserved) : 0x0 |
| 58 | ME: FW update req : 0x0 |
| 59 | ME: (Reserved) : 0x0 |
| 60 | ME: Current state : 0x1f |
| 61 | ME: Current PM event: 0x0 |
| 62 | ME: Progress code : 0x1 |
| 63 | PASSED! Tell ME that DRAM is ready |
| 64 | ME: FWS2: 0x102c012e |
| 65 | ME: Bist in progress: 0x0 |
| 66 | ME: ICC Status : 0x3 |
| 67 | ME: Invoke MEBx : 0x1 |
| 68 | ME: CPU replaced : 0x0 |
| 69 | ME: MBP ready : 0x1 |
| 70 | ME: MFS failure : 0x0 |
| 71 | ME: Warm reset req : 0x0 |
| 72 | ME: CPU repl valid : 0x1 |
| 73 | ME: (Reserved) : 0x0 |
| 74 | ME: FW update req : 0x0 |
| 75 | ME: (Reserved) : 0x0 |
| 76 | ME: Current state : 0x2c |
| 77 | ME: Current PM event: 0x0 |
| 78 | ME: Progress code : 0x1 |
| 79 | ME: Requested BIOS Action: Continue to boot |
| 80 | memcfg DDR3 ref clock 133 MHz |
| 81 | memcfg DDR3 clock 1596 MHz |
| 82 | memcfg channel assignment: A: 0, B 1, C 2 |
| 83 | memcfg channel[0] config (00620010): |
| 84 | ECC inactive |
| 85 | enhanced interleave mode on |
| 86 | rank interleave on |
| 87 | DIMMA 4096 MB width x8 dual rank, selected |
| 88 | DIMMB 0 MB width x8 single rank |
| 89 | memcfg channel[1] config (00620010): |
| 90 | ECC inactive |
| 91 | enhanced interleave mode on |
| 92 | rank interleave on |
| 93 | DIMMA 4096 MB width x8 dual rank, selected |
| 94 | DIMMB 0 MB width x8 single rank |
| 95 | CBMEM: |
| 96 | IMD: root @ 7ffff000 254 entries. |
| 97 | IMD: root @ 7fffec00 62 entries. |
| 98 | External stage cache: |
| 99 | IMD: root @ 803ff000 254 entries. |
| 100 | IMD: root @ 803fec00 62 entries. |
| 101 | CBMEM entry for DIMM info: 0x7fffe960 |
| 102 | POST: 0x3b |
| 103 | POST: 0x3c |
| 104 | POST: 0x3d |
| 105 | POST: 0x3f |
| 106 | SMM Memory Map |
| 107 | SMRAM : 0x80000000 0x800000 |
| 108 | Subregion 0: 0x80000000 0x300000 |
| 109 | Subregion 1: 0x80300000 0x100000 |
| 110 | Subregion 2: 0x80400000 0x400000 |
| 111 | MTRR Range: Start=7f800000 End=80000000 (Size 800000) |
| 112 | MTRR Range: Start=80000000 End=80800000 (Size 800000) |
| 113 | MTRR Range: Start=ff000000 End=0 (Size 1000000) |
| 114 | CBFS: 'Master Header Locator' located CBFS at [610200:c00000) |
| 115 | CBFS: Locating 'fallback/postcar' |
| 116 | CBFS: Found @ offset 423c0 size 45e8 |
| 117 | Decompressing stage fallback/postcar @ 0x7ffd2fc0 (34384 bytes) |
| 118 | Loading module at 7ffd3000 with entry 7ffd3000. filesize: 0x4350 memsize: 0x8610 |
| 119 | Processing 143 relocs. Offset value of 0x7dfd3000 |
| 120 | |
| 121 | |
| 122 | coreboot-4.10-967-g6e66d7b8eb Thu Oct 10 14:06:09 UTC 2019 postcar starting (log level: 7)... |
| 123 | CBFS: 'Master Header Locator' located CBFS at [610200:c00000) |
| 124 | CBFS: Locating 'fallback/ramstage' |
| 125 | CBFS: Found @ offset 19900 size 17479 |
| 126 | Decompressing stage fallback/ramstage @ 0x7ff8bfc0 (286552 bytes) |
| 127 | Loading module at 7ff8c000 with entry 7ff8c000. filesize: 0x30fd8 memsize: 0x45f18 |
| 128 | Processing 3560 relocs. Offset value of 0x7f18c000 |
| 129 | |
| 130 | |
| 131 | coreboot-4.10-967-g6e66d7b8eb Thu Oct 10 14:06:09 UTC 2019 ramstage starting (log level: 7)... |
| 132 | POST: 0x39 |
| 133 | POST: 0x80 |
| 134 | Normal boot. |
| 135 | POST: 0x70 |
| 136 | BS: BS_PRE_DEVICE times (us): entry 0 run 0 exit 0 |
| 137 | POST: 0x71 |
| 138 | BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 1 exit 0 |
| 139 | POST: 0x72 |
| 140 | Enumerating buses... |
| 141 | CPU_CLUSTER: 0 enabled |
| 142 | DOMAIN: 0000 enabled |
| 143 | PCI: pci_scan_bus for bus 00 |
| 144 | POST: 0x24 |
| 145 | PCI: 00:00.0 [8086/0154] enabled |
| 146 | PCI: Static device PCI: 00:01.0 not found, disabling it. |
| 147 | PCI: 00:02.0 [8086/0166] enabled |
| 148 | PCI: 00:04.0 [8086/0153] disabled |
| 149 | PCI: 00:14.0 [8086/1e31] enabled |
| 150 | PCI: 00:16.0 [8086/1e3a] enabled |
| 151 | PCI: 00:16.1: Disabling device |
| 152 | PCI: 00:16.1 [8086/1e3b] disabled No operations |
| 153 | PCI: 00:16.2: Disabling device |
| 154 | PCI: 00:16.2 [8086/1e3c] disabled No operations |
| 155 | PCI: 00:16.3: Disabling device |
| 156 | PCI: 00:16.3 [8086/1e3d] disabled No operations |
| 157 | PCI: 00:19.0 [8086/1502] enabled |
| 158 | PCI: 00:1a.0 [8086/1e2d] enabled |
| 159 | PCI: 00:1b.0 [8086/1e20] enabled |
| 160 | PCH: PCIe Root Port coalescing is enabled |
| 161 | PCI: 00:1c.0 [8086/1e10] enabled |
| 162 | PCI: 00:1c.1 [8086/1e12] enabled |
| 163 | PCI: 00:1c.2 [8086/1e14] enabled |
| 164 | PCI: 00:1c.3: Disabling device |
| 165 | PCI: 00:1c.3 [8086/1e16] disabled |
| 166 | PCI: 00:1c.4: Disabling device |
| 167 | PCI: 00:1c.4: check set enabled |
| 168 | PCI: 00:1c.4 [8086/1e18] disabled |
| 169 | PCI: 00:1c.5: Disabling device |
| 170 | PCI: 00:1c.5 [8086/1e1a] disabled |
| 171 | PCI: 00:1c.6: Disabling device |
| 172 | PCI: 00:1c.6 [8086/1e1c] disabled |
| 173 | PCI: 00:1c.7: Disabling device |
| 174 | PCI: 00:1d.0 [8086/1e26] enabled |
| 175 | PCI: 00:1e.0: Disabling device |
| 176 | PCI: 00:1e.0 [8086/2448] disabled |
| 177 | PCI: 00:1f.0 [8086/1e55] enabled |
| 178 | FMAP: area COREBOOT found @ 610200 (6225408 bytes) |
| 179 | CBFS: Locating 'cmos_layout.bin' |
| 180 | CBFS: Found @ offset 31b40 size 79c |
| 181 | PCI: 00:1f.2 [8086/1e01] enabled |
| 182 | PCI: 00:1f.3 [8086/1e22] enabled |
| 183 | PCI: 00:1f.5: Disabling device |
| 184 | PCI: 00:1f.5 [8086/1e09] disabled No operations |
| 185 | PCI: 00:1f.6: Disabling device |
| 186 | PCI: 00:1f.6 [8086/1e24] disabled No operations |
| 187 | POST: 0x25 |
| 188 | PCI: Leftover static devices: |
| 189 | PCI: 00:01.0 |
| 190 | PCI: 00:1c.7 |
| 191 | PCI: Check your devicetree.cb. |
| 192 | PCI: pci_scan_bus for bus 01 |
| 193 | POST: 0x24 |
| 194 | PCI: 01:00.0 [1180/e823] enabled |
| 195 | POST: 0x25 |
| 196 | POST: 0x55 |
| 197 | Enabling Common Clock Configuration |
| 198 | ASPM: Enabled L0s and L1 |
| 199 | Failed to enable LTR for dev = PCI: 01:00.0 |
| 200 | scan_bus: scanning of bus PCI: 00:1c.0 took 249 usecs |
| 201 | PCI: pci_scan_bus for bus 02 |
| 202 | POST: 0x24 |
| 203 | PCI: 02:00.0 [8086/08b2] enabled |
| 204 | POST: 0x25 |
| 205 | POST: 0x55 |
| 206 | Enabling Common Clock Configuration |
| 207 | ASPM: Enabled L1 |
| 208 | scan_bus: scanning of bus PCI: 00:1c.1 took 257 usecs |
| 209 | PCI: pci_scan_bus for bus 03 |
| 210 | POST: 0x24 |
| 211 | POST: 0x25 |
| 212 | POST: 0x55 |
| 213 | scan_bus: scanning of bus PCI: 00:1c.2 took 52 usecs |
| 214 | FMAP: area COREBOOT found @ 610200 (6225408 bytes) |
| 215 | CBFS: Locating 'cmos_layout.bin' |
| 216 | CBFS: Found @ offset 31b40 size 79c |
| 217 | FMAP: area COREBOOT found @ 610200 (6225408 bytes) |
| 218 | CBFS: Locating 'cmos_layout.bin' |
| 219 | CBFS: Found @ offset 31b40 size 79c |
| 220 | PMH7: ID 05 Revision 12 |
| 221 | PNP: 00ff.1 enabled |
| 222 | EC Firmware ID G1HT32WW-3.22, Version 0.01B |
| 223 | FMAP: area COREBOOT found @ 610200 (6225408 bytes) |
| 224 | CBFS: Locating 'cmos_layout.bin' |
| 225 | CBFS: Found @ offset 31b40 size 79c |
| 226 | No CMOS option 'power_management_beeps'. |
| 227 | FMAP: area COREBOOT found @ 610200 (6225408 bytes) |
| 228 | CBFS: Locating 'cmos_layout.bin' |
| 229 | CBFS: Found @ offset 31b40 size 79c |
| 230 | No CMOS option 'low_battery_beep'. |
| 231 | FMAP: area COREBOOT found @ 610200 (6225408 bytes) |
| 232 | CBFS: Locating 'cmos_layout.bin' |
| 233 | CBFS: Found @ offset 31b40 size 79c |
| 234 | FMAP: area COREBOOT found @ 610200 (6225408 bytes) |
| 235 | CBFS: Locating 'cmos_layout.bin' |
| 236 | CBFS: Found @ offset 31b40 size 79c |
| 237 | FMAP: area COREBOOT found @ 610200 (6225408 bytes) |
| 238 | CBFS: Locating 'cmos_layout.bin' |
| 239 | CBFS: Found @ offset 31b40 size 79c |
| 240 | FMAP: area COREBOOT found @ 610200 (6225408 bytes) |
| 241 | CBFS: Locating 'cmos_layout.bin' |
| 242 | CBFS: Found @ offset 31b40 size 79c |
| 243 | H8: WWAN installed |
| 244 | FMAP: area COREBOOT found @ 610200 (6225408 bytes) |
| 245 | CBFS: Locating 'cmos_layout.bin' |
| 246 | CBFS: Found @ offset 31b40 size 79c |
| 247 | FMAP: area COREBOOT found @ 610200 (6225408 bytes) |
| 248 | CBFS: Locating 'cmos_layout.bin' |
| 249 | CBFS: Found @ offset 31b40 size 79c |
| 250 | FMAP: area COREBOOT found @ 610200 (6225408 bytes) |
| 251 | CBFS: Locating 'cmos_layout.bin' |
| 252 | CBFS: Found @ offset 31b40 size 79c |
| 253 | FMAP: area COREBOOT found @ 610200 (6225408 bytes) |
| 254 | CBFS: Locating 'cmos_layout.bin' |
| 255 | CBFS: Found @ offset 31b40 size 79c |
| 256 | PNP: 00ff.2 enabled |
| 257 | Hybrid graphics: Not installed |
| 258 | PNP: 00ff.f disabled |
| 259 | PNP: 0c31.0 enabled |
| 260 | scan_bus: scanning of bus PCI: 00:1f.0 took 4918 usecs |
| 261 | bus: PCI: 00:1f.3[0]->I2C: 01:54 enabled |
| 262 | bus: PCI: 00:1f.3[0]->I2C: 01:55 enabled |
| 263 | bus: PCI: 00:1f.3[0]->I2C: 01:56 enabled |
| 264 | bus: PCI: 00:1f.3[0]->I2C: 01:57 enabled |
| 265 | bus: PCI: 00:1f.3[0]->I2C: 01:5c enabled |
| 266 | bus: PCI: 00:1f.3[0]->I2C: 01:5d enabled |
| 267 | bus: PCI: 00:1f.3[0]->I2C: 01:5e enabled |
| 268 | bus: PCI: 00:1f.3[0]->I2C: 01:5f enabled |
| 269 | scan_bus: scanning of bus PCI: 00:1f.3 took 16 usecs |
| 270 | POST: 0x55 |
| 271 | scan_bus: scanning of bus DOMAIN: 0000 took 5883 usecs |
| 272 | scan_bus: scanning of bus Root Device took 5888 usecs |
| 273 | done |
| 274 | FMAP: area RW_MRC_CACHE found @ 600000 (65536 bytes) |
| 275 | MRC: No data in cbmem for 'RW_MRC_CACHE'. |
| 276 | BS: BS_DEV_ENUMERATE times (us): entry 0 run 5914 exit 3 |
| 277 | POST: 0x73 |
| 278 | found VGA at PCI: 00:02.0 |
| 279 | Setting up VGA for PCI: 00:02.0 |
| 280 | Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 |
| 281 | Setting PCI_BRIDGE_CTL_VGA for bridge Root Device |
| 282 | Allocating resources... |
| 283 | Reading resources... |
| 284 | Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000. |
| 285 | PNP: 00ff.1 missing read_resources |
| 286 | PNP: 00ff.2 missing read_resources |
| 287 | Done reading resources. |
| 288 | skipping PNP: 00ff.2@60 fixed resource, size=0! |
| 289 | skipping PNP: 00ff.2@62 fixed resource, size=0! |
| 290 | skipping PNP: 00ff.2@64 fixed resource, size=0! |
| 291 | skipping PNP: 00ff.2@66 fixed resource, size=0! |
| 292 | Setting resources... |
| 293 | TOUUD 0x27b600000 TOLUD 0x82a00000 TOM 0x200000000 |
| 294 | MEBASE 0x1fe000000 |
| 295 | IGD decoded, subtracting 32M UMA and 2M GTT |
| 296 | TSEG base 0x80000000 size 8M |
| 297 | Available memory below 4GB: 2048M |
| 298 | Available memory above 4GB: 6070M |
| 299 | PCI: 00:02.0 10 <- [0x00e1000000 - 0x00e13fffff] size 0x00400000 gran 0x16 mem64 |
| 300 | PCI: 00:02.0 18 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem64 |
| 301 | PCI: 00:02.0 20 <- [0x0000003000 - 0x000000303f] size 0x00000040 gran 0x06 io |
| 302 | PCI: 00:14.0 10 <- [0x00e1620000 - 0x00e162ffff] size 0x00010000 gran 0x10 mem64 |
| 303 | PCI: 00:16.0 10 <- [0x00e1639000 - 0x00e163900f] size 0x00000010 gran 0x04 mem64 |
| 304 | PCI: 00:19.0 10 <- [0x00e1600000 - 0x00e161ffff] size 0x00020000 gran 0x11 mem |
| 305 | PCI: 00:19.0 14 <- [0x00e1634000 - 0x00e1634fff] size 0x00001000 gran 0x0c mem |
| 306 | PCI: 00:19.0 18 <- [0x0000003040 - 0x000000305f] size 0x00000020 gran 0x05 io |
| 307 | PCI: 00:1a.0 10 <- [0x00e1636000 - 0x00e16363ff] size 0x00000400 gran 0x0a mem |
| 308 | PCI: 00:1b.0 10 <- [0x00e1630000 - 0x00e1633fff] size 0x00004000 gran 0x0e mem64 |
| 309 | PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io |
| 310 | PCI: 00:1c.0 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 01 prefmem |
| 311 | PCI: 00:1c.0 20 <- [0x00e1400000 - 0x00e14fffff] size 0x00100000 gran 0x14 bus 01 mem |
| 312 | PCI: 01:00.0 10 <- [0x00e1400000 - 0x00e14000ff] size 0x00000100 gran 0x08 mem |
| 313 | PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io |
| 314 | PCI: 00:1c.1 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 02 prefmem |
| 315 | PCI: 00:1c.1 20 <- [0x00e1500000 - 0x00e15fffff] size 0x00100000 gran 0x14 bus 02 mem |
| 316 | PCI: 02:00.0 10 <- [0x00e1500000 - 0x00e1501fff] size 0x00002000 gran 0x0d mem64 |
| 317 | PCI: 00:1c.2 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 03 io |
| 318 | PCI: 00:1c.2 24 <- [0x00e0000000 - 0x00e07fffff] size 0x00800000 gran 0x14 bus 03 prefmem |
| 319 | PCI: 00:1c.2 20 <- [0x00e0800000 - 0x00e0ffffff] size 0x00800000 gran 0x14 bus 03 mem |
| 320 | NONE missing set_resources |
| 321 | PCI: 00:1d.0 10 <- [0x00e1637000 - 0x00e16373ff] size 0x00000400 gran 0x0a mem |
| 322 | PNP: 00ff.1 missing set_resources |
| 323 | PNP: 00ff.2 missing set_resources |
| 324 | PCI: 00:1f.2 10 <- [0x0000003080 - 0x0000003087] size 0x00000008 gran 0x03 io |
| 325 | PCI: 00:1f.2 14 <- [0x0000003090 - 0x0000003093] size 0x00000004 gran 0x02 io |
| 326 | PCI: 00:1f.2 18 <- [0x0000003088 - 0x000000308f] size 0x00000008 gran 0x03 io |
| 327 | PCI: 00:1f.2 1c <- [0x0000003094 - 0x0000003097] size 0x00000004 gran 0x02 io |
| 328 | PCI: 00:1f.2 20 <- [0x0000003060 - 0x000000307f] size 0x00000020 gran 0x05 io |
| 329 | PCI: 00:1f.2 24 <- [0x00e1635000 - 0x00e16357ff] size 0x00000800 gran 0x0b mem |
| 330 | PCI: 00:1f.3 10 <- [0x00e1638000 - 0x00e16380ff] size 0x00000100 gran 0x08 mem64 |
| 331 | Done setting resources. |
| 332 | Done allocating resources. |
| 333 | BS: BS_DEV_RESOURCES times (us): entry 0 run 1286 exit 0 |
| 334 | POST: 0x74 |
| 335 | Enabling resources... |
| 336 | PCI: 00:00.0 subsystem <- 17aa/21f3 |
| 337 | PCI: 00:00.0 cmd <- 06 |
| 338 | PCI: 00:02.0 subsystem <- 17aa/21f3 |
| 339 | PCI: 00:02.0 cmd <- 03 |
| 340 | PCI: 00:14.0 subsystem <- 17aa/21f3 |
| 341 | PCI: 00:14.0 cmd <- 102 |
| 342 | PCI: 00:16.0 subsystem <- 17aa/21f3 |
| 343 | PCI: 00:16.0 cmd <- 02 |
| 344 | PCI: 00:19.0 subsystem <- 17aa/21f3 |
| 345 | PCI: 00:19.0 cmd <- 103 |
| 346 | PCI: 00:1a.0 subsystem <- 17aa/21f3 |
| 347 | PCI: 00:1a.0 cmd <- 102 |
| 348 | PCI: 00:1b.0 subsystem <- 17aa/21f3 |
| 349 | PCI: 00:1b.0 cmd <- 102 |
| 350 | PCI: 00:1c.0 bridge ctrl <- 0013 |
| 351 | PCI: 00:1c.0 subsystem <- 17aa/21f3 |
| 352 | PCI: 00:1c.0 cmd <- 106 |
| 353 | PCI: 00:1c.1 bridge ctrl <- 0013 |
| 354 | PCI: 00:1c.1 subsystem <- 17aa/21f3 |
| 355 | PCI: 00:1c.1 cmd <- 106 |
| 356 | PCI: 00:1c.2 bridge ctrl <- 0013 |
| 357 | PCI: 00:1c.2 subsystem <- 17aa/21f3 |
| 358 | PCI: 00:1c.2 cmd <- 107 |
| 359 | PCI: 00:1d.0 subsystem <- 17aa/21f3 |
| 360 | PCI: 00:1d.0 cmd <- 102 |
| 361 | PCI: 00:1f.0 subsystem <- 17aa/21f3 |
| 362 | PCI: 00:1f.0 cmd <- 107 |
| 363 | PCI: 00:1f.2 subsystem <- 17aa/21f3 |
| 364 | PCI: 00:1f.2 cmd <- 03 |
| 365 | PCI: 00:1f.3 subsystem <- 17aa/21f3 |
| 366 | PCI: 00:1f.3 cmd <- 103 |
| 367 | PCI: 01:00.0 subsystem <- 17aa/21f3 |
| 368 | PCI: 01:00.0 cmd <- 06 |
| 369 | PCI: 02:00.0 cmd <- 02 |
| 370 | done. |
| 371 | BS: BS_DEV_ENABLE times (us): entry 0 run 131 exit 0 |
| 372 | Found TPM ST33ZP24 by ST Microelectronics |
| 373 | TPM: Startup |
| 374 | TPM: command 0x99 returned 0x0 |
| 375 | TPM: Asserting physical presence |
| 376 | TPM: command 0x4000000a returned 0x0 |
| 377 | TPM: command 0x65 returned 0x0 |
| 378 | TPM: flags disable=0, deactivated=0, nvlocked=1 |
| 379 | TPM: setup succeeded |
| 380 | POST: 0x75 |
| 381 | Initializing devices... |
| 382 | Root Device init ... |
| 383 | Root Device init finished in 0 usecs |
| 384 | POST: 0x75 |
| 385 | CPU_CLUSTER: 0 init ... |
| 386 | MTRR: Physical address space: |
| 387 | 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 |
| 388 | 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 |
| 389 | 0x00000000000c0000 - 0x0000000080000000 size 0x7ff40000 type 6 |
| 390 | 0x0000000080000000 - 0x00000000d0000000 size 0x50000000 type 0 |
| 391 | 0x00000000d0000000 - 0x00000000e0000000 size 0x10000000 type 1 |
| 392 | 0x00000000e0000000 - 0x0000000100000000 size 0x20000000 type 0 |
| 393 | 0x0000000100000000 - 0x000000027b600000 size 0x17b600000 type 6 |
| 394 | MTRR: Fixed MSR 0x250 0x0606060606060606 |
| 395 | MTRR: Fixed MSR 0x258 0x0606060606060606 |
| 396 | MTRR: Fixed MSR 0x259 0x0000000000000000 |
| 397 | MTRR: Fixed MSR 0x268 0x0606060606060606 |
| 398 | MTRR: Fixed MSR 0x269 0x0606060606060606 |
| 399 | MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| 400 | MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| 401 | MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| 402 | MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| 403 | MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| 404 | MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| 405 | CPU physical address size: 36 bits |
| 406 | MTRR: default type WB/UC MTRR counts: 4/4. |
| 407 | MTRR: UC selected as default type. |
| 408 | MTRR: 0 base 0x0000000000000000 mask 0x0000000f80000000 type 6 |
| 409 | MTRR: 1 base 0x00000000d0000000 mask 0x0000000ff0000000 type 1 |
| 410 | MTRR: 2 base 0x0000000100000000 mask 0x0000000f00000000 type 6 |
| 411 | MTRR: 3 base 0x0000000200000000 mask 0x0000000f80000000 type 6 |
| 412 | |
| 413 | MTRR check |
| 414 | Fixed MTRRs : Enabled |
| 415 | Variable MTRRs: Enabled |
| 416 | |
| 417 | POST: 0x93 |
| 418 | CPU has 4 cores, 8 threads enabled. |
| 419 | Setting up SMI for CPU |
| 420 | Will perform SMM setup. |
| 421 | CBFS: 'Master Header Locator' located CBFS at [610200:c00000) |
| 422 | CBFS: Locating 'cpu_microcode_blob.bin' |
| 423 | CBFS: Found @ offset 13080 size 6800 |
| 424 | microcode: sig=0x306a9 pf=0x10 revision=0x21 |
| 425 | CPU: Intel(R) Core(TM) i7-3740QM CPU @ 2.70GHz. |
| 426 | Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170 |
| 427 | Processing 16 relocs. Offset value of 0x00030000 |
| 428 | Attempting to start 7 APs |
| 429 | Waiting for 10ms after sending INIT. |
| 430 | Waiting for 1st SIPI to complete...done. |
| 431 | Waiting for 2nd SIPI to complete...AP: slot 1 apic_id 1. |
| 432 | done. |
| 433 | AP: slot 2 apic_id 5. |
| 434 | AP: slot 3 apic_id 7. |
| 435 | AP: slot 7 apic_id 3. |
| 436 | AP: slot 4 apic_id 4. |
| 437 | AP: slot 6 apic_id 2. |
| 438 | AP: slot 5 apic_id 6. |
| 439 | Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8 |
| 440 | Processing 13 relocs. Offset value of 0x00038000 |
| 441 | SMM Module: stub loaded at 00038000. Will call 7ffa5c47(00000000) |
| 442 | Installing SMM handler to 0x80000000 |
| 443 | Loading module at 80010000 with entry 800105fb. filesize: 0x1d10 memsize: 0x5d40 |
| 444 | Processing 82 relocs. Offset value of 0x80010000 |
| 445 | Loading module at 80008000 with entry 80008000. filesize: 0x1a8 memsize: 0x1a8 |
| 446 | Processing 13 relocs. Offset value of 0x80008000 |
| 447 | SMM Module: placing jmp sequence at 80007c00 rel16 0x03fd |
| 448 | SMM Module: placing jmp sequence at 80007800 rel16 0x07fd |
| 449 | SMM Module: placing jmp sequence at 80007400 rel16 0x0bfd |
| 450 | SMM Module: placing jmp sequence at 80007000 rel16 0x0ffd |
| 451 | SMM Module: placing jmp sequence at 80006c00 rel16 0x13fd |
| 452 | SMM Module: placing jmp sequence at 80006800 rel16 0x17fd |
| 453 | SMM Module: placing jmp sequence at 80006400 rel16 0x1bfd |
| 454 | SMM Module: stub loaded at 80008000. Will call 800105fb(00000000) |
| 455 | Initializing Southbridge SMI... |
| 456 | |
| 457 | New SMBASE 0x80000000 |
| 458 | In relocation handler: cpu 0 |
| 459 | New SMBASE=0x80000000 IEDBASE=0x80400000 |
| 460 | Writing SMRR. base = 0x80000006, mask=0xff800800 |
| 461 | Relocation complete. |
| 462 | microcode: Update skipped, already up-to-date |
| 463 | New SMBASE 0x7ffffc00 |
| 464 | In relocation handler: cpu 1 |
| 465 | New SMBASE=0x7ffffc00 IEDBASE=0x80400000 |
| 466 | Writing SMRR. base = 0x80000006, mask=0xff800800 |
| 467 | Relocation complete. |
| 468 | microcode: Update skipped, already up-to-date |
| 469 | New SMBASE 0x7ffff800 |
| 470 | In relocation handler: cpu 2 |
| 471 | New SMBASE=0x7ffff800 IEDBASE=0x80400000 |
| 472 | Writing SMRR. base = 0x80000006, mask=0xff800800 |
| 473 | Relocation complete. |
| 474 | microcode: Update skipped, already up-to-date |
| 475 | New SMBASE 0x7ffff000 |
| 476 | In relocation handler: cpu 4 |
| 477 | New SMBASE=0x7ffff000 IEDBASE=0x80400000 |
| 478 | Writing SMRR. base = 0x80000006, mask=0xff800800 |
| 479 | Relocation complete. |
| 480 | microcode: Update skipped, already up-to-date |
| 481 | New SMBASE 0x7fffe800 |
| 482 | In relocation handler: cpu 6 |
| 483 | New SMBASE=0x7fffe800 IEDBASE=0x80400000 |
| 484 | Writing SMRR. base = 0x80000006, mask=0xff800800 |
| 485 | Relocation complete. |
| 486 | microcode: Update skipped, already up-to-date |
| 487 | New SMBASE 0x7fffe400 |
| 488 | In relocation handler: cpu 7 |
| 489 | New SMBASE=0x7fffe400 IEDBASE=0x80400000 |
| 490 | Writing SMRR. base = 0x80000006, mask=0xff800800 |
| 491 | Relocation complete. |
| 492 | microcode: Update skipped, already up-to-date |
| 493 | New SMBASE 0x7ffff400 |
| 494 | In relocation handler: cpu 3 |
| 495 | New SMBASE=0x7ffff400 IEDBASE=0x80400000 |
| 496 | Writing SMRR. base = 0x80000006, mask=0xff800800 |
| 497 | Relocation complete. |
| 498 | microcode: Update skipped, already up-to-date |
| 499 | New SMBASE 0x7fffec00 |
| 500 | In relocation handler: cpu 5 |
| 501 | New SMBASE=0x7fffec00 IEDBASE=0x80400000 |
| 502 | Writing SMRR. base = 0x80000006, mask=0xff800800 |
| 503 | Relocation complete. |
| 504 | microcode: Update skipped, already up-to-date |
| 505 | Initializing CPU #0 |
| 506 | CPU: vendor Intel device 306a9 |
| 507 | CPU: family 06, model 3a, stepping 09 |
| 508 | POST: 0x60 |
| 509 | Enabling cache |
| 510 | CPU: Intel(R) Core(TM) i7-3740QM CPU @ 2.70GHz. |
| 511 | CPU: platform id 4 |
| 512 | CPU: cpuid(1) 0x306a9 |
| 513 | CPU: AES supported |
| 514 | CPU: TXT supported |
| 515 | CPU: VT supported |
| 516 | Setting up local APIC... |
| 517 | apic_id: 0x00 done. |
| 518 | VMX status: enabled |
| 519 | IA32_FEATURE_CONTROL status: locked |
| 520 | model_x06ax: energy policy set to 6 |
| 521 | model_x06ax: frequency set to 2700 |
| 522 | Turbo is available but hidden |
| 523 | Turbo is available and visible |
| 524 | CPU #0 initialized |
| 525 | Initializing CPU #1 |
| 526 | Initializing CPU #2 |
| 527 | Initializing CPU #4 |
| 528 | CPU: vendor Intel device 306a9 |
| 529 | CPU: family 06, model 3a, stepping 09 |
| 530 | CPU: vendor Intel device 306a9 |
| 531 | CPU: family 06, model 3a, stepping 09 |
| 532 | Initializing CPU #7 |
| 533 | Initializing CPU #6 |
| 534 | CPU: vendor Intel device 306a9 |
| 535 | CPU: family 06, model 3a, stepping 09 |
| 536 | CPU: vendor Intel device 306a9 |
| 537 | CPU: family 06, model 3a, stepping 09 |
| 538 | POST: 0x60 |
| 539 | Enabling cache |
| 540 | POST: 0x60 |
| 541 | Enabling cache |
| 542 | POST: 0x60 |
| 543 | Enabling cache |
| 544 | POST: 0x60 |
| 545 | CPU: vendor Intel device 306a9 |
| 546 | CPU: family 06, model 3a, stepping 09 |
| 547 | Initializing CPU #5 |
| 548 | POST: 0x60 |
| 549 | Enabling cache |
| 550 | CPU: Intel(R) Core(TM) i7-3740QM CPU @ 2.70GHz. |
| 551 | CPU: Intel(R) Core(TM) i7-3740QM CPU @ 2.70GHz. |
| 552 | CPU: platform id 4 |
| 553 | CPU: platform id 4 |
| 554 | CPU: cpuid(1) 0x306a9 |
| 555 | CPU: cpuid(1) 0x306a9 |
| 556 | CPU: AES supported |
| 557 | CPU: TXT supported |
| 558 | CPU: VT supported |
| 559 | CPU: AES supported |
| 560 | CPU: TXT supported |
| 561 | CPU: VT supported |
| 562 | Setting up local APIC... |
| 563 | Setting up local APIC... |
| 564 | CPU: vendor Intel device 306a9 |
| 565 | CPU: family 06, model 3a, stepping 09 |
| 566 | Initializing CPU #3 |
| 567 | POST: 0x60 |
| 568 | CPU: vendor Intel device 306a9 |
| 569 | Enabling cache |
| 570 | CPU: family 06, model 3a, stepping 09 |
| 571 | Enabling cache |
| 572 | CPU: Intel(R) Core(TM) i7-3740QM CPU @ 2.70GHz. |
| 573 | POST: 0x60 |
| 574 | Enabling cache |
| 575 | CPU: platform id 4 |
| 576 | CPU: Intel(R) Core(TM) i7-3740QM CPU @ 2.70GHz. |
| 577 | apic_id: 0x03 done. |
| 578 | apic_id: 0x02 VMX status: enabled |
| 579 | done. |
| 580 | CPU: Intel(R) Core(TM) i7-3740QM CPU @ 2.70GHz. |
| 581 | CPU: cpuid(1) 0x306a9 |
| 582 | CPU: platform id 4 |
| 583 | CPU: AES supported |
| 584 | CPU: TXT supported |
| 585 | CPU: VT supported |
| 586 | CPU: cpuid(1) 0x306a9 |
| 587 | Setting up local APIC... |
| 588 | CPU: AES supported |
| 589 | CPU: TXT supported |
| 590 | CPU: VT supported |
| 591 | CPU: platform id 4 |
| 592 | CPU: Intel(R) Core(TM) i7-3740QM CPU @ 2.70GHz. |
| 593 | CPU: Intel(R) Core(TM) i7-3740QM CPU @ 2.70GHz. |
| 594 | CPU: platform id 4 |
| 595 | CPU: platform id 4 |
| 596 | CPU: cpuid(1) 0x306a9 |
| 597 | CPU: cpuid(1) 0x306a9 |
| 598 | CPU: AES supported |
| 599 | CPU: TXT supported |
| 600 | CPU: VT supported |
| 601 | CPU: AES supported |
| 602 | CPU: TXT supported |
| 603 | CPU: VT supported |
| 604 | Setting up local APIC... |
| 605 | Setting up local APIC... |
| 606 | IA32_FEATURE_CONTROL status: locked |
| 607 | VMX status: enabled |
| 608 | apic_id: 0x04 done. |
| 609 | apic_id: 0x06 done. |
| 610 | VMX status: enabled |
| 611 | Setting up local APIC... |
| 612 | IA32_FEATURE_CONTROL status: locked |
| 613 | apic_id: 0x07 done. |
| 614 | VMX status: enabled |
| 615 | VMX status: enabled |
| 616 | IA32_FEATURE_CONTROL status: locked |
| 617 | IA32_FEATURE_CONTROL status: locked |
| 618 | apic_id: 0x05 done. |
| 619 | IA32_FEATURE_CONTROL status: locked |
| 620 | VMX status: enabled |
| 621 | CPU: cpuid(1) 0x306a9 |
| 622 | model_x06ax: energy policy set to 6 |
| 623 | CPU: AES supported |
| 624 | CPU: TXT supported |
| 625 | CPU: VT supported |
| 626 | IA32_FEATURE_CONTROL status: locked |
| 627 | Setting up local APIC... |
| 628 | model_x06ax: frequency set to 2700 |
| 629 | CPU #7 initialized |
| 630 | model_x06ax: energy policy set to 6 |
| 631 | apic_id: 0x01 done. |
| 632 | model_x06ax: energy policy set to 6 |
| 633 | model_x06ax: frequency set to 2700 |
| 634 | VMX status: enabled |
| 635 | model_x06ax: frequency set to 2700 |
| 636 | model_x06ax: energy policy set to 6 |
| 637 | CPU #5 initialized |
| 638 | IA32_FEATURE_CONTROL status: locked |
| 639 | model_x06ax: energy policy set to 6 |
| 640 | CPU #4 initialized |
| 641 | model_x06ax: energy policy set to 6 |
| 642 | model_x06ax: frequency set to 2700 |
| 643 | CPU #3 initialized |
| 644 | model_x06ax: frequency set to 2700 |
| 645 | CPU #6 initialized |
| 646 | model_x06ax: frequency set to 2700 |
| 647 | CPU #2 initialized |
| 648 | model_x06ax: energy policy set to 6 |
| 649 | model_x06ax: frequency set to 2700 |
| 650 | CPU #1 initialized |
| 651 | bsp_do_flight_plan done after 25 msecs. |
| 652 | Initializing southbridge SMI... |
| 653 | SMI_STS: |
| 654 | GPE0_STS: GPIO15 GPIO14 GPIO11 GPIO9 GPIO7 GPIO5 GPIO4 GPIO3 GPIO0 |
| 655 | ALT_GP_SMI_STS: GPI14 GPI13 GPI11 GPI10 GPI9 GPI7 GPI6 GPI5 GPI4 GPI3 GPI1 GPI0 |
| 656 | TCO_STS: |
| 657 | Locking SMM. |
| 658 | CPU_CLUSTER: 0 init finished in 39705 usecs |
| 659 | POST: 0x75 |
| 660 | POST: 0x75 |
| 661 | POST: 0x75 |
| 662 | POST: 0x75 |
| 663 | POST: 0x75 |
| 664 | POST: 0x75 |
| 665 | POST: 0x75 |
| 666 | POST: 0x75 |
| 667 | POST: 0x75 |
| 668 | POST: 0x75 |
| 669 | POST: 0x75 |
| 670 | PCI: 00:00.0 init ... |
| 671 | Disabling PEG12. |
| 672 | Disabling PEG11. |
| 673 | Disabling PEG10. |
| 674 | Disabling Device 4. |
| 675 | Disabling PEG60. |
| 676 | Disabling Device 7. |
| 677 | Disabling PEG IO clock. |
| 678 | Set BIOS_RESET_CPL |
| 679 | CPU TDP: 45 Watts |
| 680 | PCI: 00:00.0 init finished in 1012 usecs |
| 681 | POST: 0x75 |
| 682 | PCI: 00:02.0 init ... |
| 683 | GT Power Management Init |
| 684 | IVB GT2 35W Power Meter Weights |
| 685 | CBFS: 'Master Header Locator' located CBFS at [610200:c00000) |
| 686 | CBFS: Locating 'pci8086,0166.rom' |
| 687 | CBFS: Found @ offset 32340 size 10000 |
| 688 | In CBFS, ROM address for PCI: 00:02.0 = ffa42588 |
| 689 | Copying VGA ROM Image from ffa42588 to 0xc0000, 0x10000 bytes |
| 690 | Calling Option ROM... |
| 691 | intel_vga_int15_handler: AX=5fac BX=0190 CX=0000 DX=00c0 |
| 692 | Unknown INT15 function 5fac! |
| 693 | int15 call returned error. |
| 694 | intel_vga_int15_handler: AX=5f40 BX=0000 CX=0004 DX=0001 |
| 695 | DISPLAY=0 |
| 696 | intel_vga_int15_handler: AX=5f35 BX=c000 CX=0002 DX=03da |
| 697 | ... Option ROM returned. |
| 698 | VBE: Getting information about VESA mode 4118 |
| 699 | VBE: resolution: 1024x768@32 |
| 700 | VBE: framebuffer: d0000000 |
| 701 | VBE: Setting VESA mode 4118 |
| 702 | VGA Option ROM was run |
| 703 | GT Power Management Init (post VBIOS) |
| 704 | PCI: 00:02.0 init finished in 841348 usecs |
| 705 | POST: 0x75 |
| 706 | POST: 0x75 |
| 707 | PCI: 00:14.0 init ... |
| 708 | XHCI: Setting up controller.. done. |
| 709 | PCI: 00:14.0 init finished in 6 usecs |
| 710 | POST: 0x75 |
| 711 | PCI: 00:16.0 init ... |
| 712 | intel_me_path: mbp is not ready! |
| 713 | ME: BIOS path: Error |
| 714 | PCI: 00:16.0 init finished in 4 usecs |
| 715 | POST: 0x75 |
| 716 | POST: 0x75 |
| 717 | POST: 0x75 |
| 718 | POST: 0x75 |
| 719 | PCI: 00:19.0 init ... |
| 720 | PCI: 00:19.0 init finished in 0 usecs |
| 721 | POST: 0x75 |
| 722 | PCI: 00:1a.0 init ... |
| 723 | EHCI: Setting up controller.. done. |
| 724 | PCI: 00:1a.0 init finished in 12 usecs |
| 725 | POST: 0x75 |
| 726 | PCI: 00:1b.0 init ... |
| 727 | Azalia: base = e1630000 |
| 728 | Azalia: codec_mask = 09 |
| 729 | Azalia: Initializing codec #3 |
| 730 | Azalia: codec viddid: 80862806 |
| 731 | Azalia: verb_size: 16 |
| 732 | Azalia: verb loaded. |
| 733 | Azalia: Initializing codec #0 |
| 734 | Azalia: codec viddid: 10ec0269 |
| 735 | Azalia: verb_size: 44 |
| 736 | Azalia: verb loaded. |
| 737 | PCI: 00:1b.0 init finished in 4601 usecs |
| 738 | POST: 0x75 |
| 739 | PCI: 00:1c.0 init ... |
| 740 | Initializing PCH PCIe bridge. |
| 741 | PCI: 00:1c.0 init finished in 10 usecs |
| 742 | POST: 0x75 |
| 743 | PCI: 00:1c.1 init ... |
| 744 | Initializing PCH PCIe bridge. |
| 745 | PCI: 00:1c.1 init finished in 10 usecs |
| 746 | POST: 0x75 |
| 747 | PCI: 00:1c.2 init ... |
| 748 | Initializing PCH PCIe bridge. |
| 749 | PCI: 00:1c.2 init finished in 12 usecs |
| 750 | POST: 0x75 |
| 751 | POST: 0x75 |
| 752 | POST: 0x75 |
| 753 | POST: 0x75 |
| 754 | POST: 0x75 |
| 755 | PCI: 00:1d.0 init ... |
| 756 | EHCI: Setting up controller.. done. |
| 757 | PCI: 00:1d.0 init finished in 12 usecs |
| 758 | POST: 0x75 |
| 759 | POST: 0x75 |
| 760 | PCI: 00:1f.0 init ... |
| 761 | pch: lpc_init |
| 762 | PCH: detected QM77, device id: 0x1e55, rev id 0x4 |
| 763 | IOAPIC: Initializing IOAPIC at 0xfec00000 |
| 764 | IOAPIC: Bootstrap Processor Local APIC = 0x00 |
| 765 | IOAPIC: ID = 0x02 |
| 766 | FMAP: area COREBOOT found @ 610200 (6225408 bytes) |
| 767 | CBFS: Locating 'cmos_layout.bin' |
| 768 | CBFS: Found @ offset 31b40 size 79c |
| 769 | Set power off after power failure. |
| 770 | FMAP: area COREBOOT found @ 610200 (6225408 bytes) |
| 771 | CBFS: Locating 'cmos_layout.bin' |
| 772 | CBFS: Found @ offset 31b40 size 79c |
| 773 | NMI sources enabled. |
| 774 | PantherPoint PM init |
| 775 | RTC: failed = 0x0 |
| 776 | RTC Init |
| 777 | Disabling ACPI via APMC: |
| 778 | done. |
| 779 | pch_spi_init |
| 780 | PCI: 00:1f.0 init finished in 1308 usecs |
| 781 | POST: 0x75 |
| 782 | PCI: 00:1f.2 init ... |
| 783 | SATA: Initializing... |
| 784 | FMAP: area COREBOOT found @ 610200 (6225408 bytes) |
| 785 | CBFS: Locating 'cmos_layout.bin' |
| 786 | CBFS: Found @ offset 31b40 size 79c |
| 787 | SATA: Controller in AHCI mode. |
| 788 | ABAR: e1635000 |
| 789 | PCI: 00:1f.2 init finished in 697 usecs |
| 790 | POST: 0x75 |
| 791 | PCI: 00:1f.3 init ... |
| 792 | PCI: 00:1f.3 init finished in 8 usecs |
| 793 | POST: 0x75 |
| 794 | POST: 0x75 |
| 795 | POST: 0x75 |
| 796 | PCI: 01:00.0 init ... |
| 797 | PCI: 01:00.0 init finished in 14 usecs |
| 798 | POST: 0x75 |
| 799 | PCI: 02:00.0 init ... |
| 800 | PCI: 02:00.0 init finished in 1 usecs |
| 801 | POST: 0x75 |
| 802 | POST: 0x75 |
| 803 | POST: 0x75 |
| 804 | PNP: 00ff.2 init ... |
| 805 | PNP: 00ff.2 init finished in 0 usecs |
| 806 | POST: 0x75 |
| 807 | POST: 0x75 |
| 808 | POST: 0x75 |
| 809 | smbus: PCI: 00:1f.3[0]->I2C: 01:54 init ... |
| 810 | I2C: 01:54 init finished in 1 usecs |
| 811 | POST: 0x75 |
| 812 | smbus: PCI: 00:1f.3[0]->I2C: 01:55 init ... |
| 813 | I2C: 01:55 init finished in 1 usecs |
| 814 | POST: 0x75 |
| 815 | smbus: PCI: 00:1f.3[0]->I2C: 01:56 init ... |
| 816 | I2C: 01:56 init finished in 1 usecs |
| 817 | POST: 0x75 |
| 818 | smbus: PCI: 00:1f.3[0]->I2C: 01:57 init ... |
| 819 | I2C: 01:57 init finished in 1 usecs |
| 820 | POST: 0x75 |
| 821 | smbus: PCI: 00:1f.3[0]->I2C: 01:5c init ... |
| 822 | Locking EEPROM RFID |
| 823 | init EEPROM done |
| 824 | I2C: 01:5c init finished in 26905 usecs |
| 825 | POST: 0x75 |
| 826 | smbus: PCI: 00:1f.3[0]->I2C: 01:5d init ... |
| 827 | I2C: 01:5d init finished in 1 usecs |
| 828 | POST: 0x75 |
| 829 | smbus: PCI: 00:1f.3[0]->I2C: 01:5e init ... |
| 830 | I2C: 01:5e init finished in 1 usecs |
| 831 | POST: 0x75 |
| 832 | smbus: PCI: 00:1f.3[0]->I2C: 01:5f init ... |
| 833 | I2C: 01:5f init finished in 1 usecs |
| 834 | Devices initialized |
| 835 | BS: BS_DEV_INIT times (us): entry 64961 run 915725 exit 0 |
| 836 | POST: 0x76 |
| 837 | Finalize devices... |
| 838 | PCI: 00:1f.0 final |
| 839 | flash size 0xc00000 bytes |
| 840 | SF: Detected Opaque HW-sequencing with sector size 0x1000, total 0xc00000 |
| 841 | Devices finalized |
| 842 | BS: BS_POST_DEVICE times (us): entry 0 run 57 exit 0 |
| 843 | POST: 0x77 |
| 844 | BS: BS_OS_RESUME_CHECK times (us): entry 0 run 1 exit 0 |
| 845 | POST: 0x79 |
| 846 | POST: 0x9c |
| 847 | CBFS: 'Master Header Locator' located CBFS at [610200:c00000) |
| 848 | CBFS: Locating 'fallback/dsdt.aml' |
| 849 | CBFS: Found @ offset 46a00 size 3921 |
| 850 | CBFS: 'Master Header Locator' located CBFS at [610200:c00000) |
| 851 | CBFS: Locating 'fallback/slic' |
| 852 | CBFS: 'fallback/slic' not found. |
| 853 | ACPI: Writing ACPI tables at 7ff4f000. |
| 854 | ACPI: * FACS |
| 855 | ACPI: * DSDT |
| 856 | ACPI: * FADT |
| 857 | ACPI: added table 1/32, length now 40 |
| 858 | ACPI: * SSDT |
| 859 | Generating ACPI PIRQ entries |
| 860 | Found 1 CPU(s) with 8 core(s) each. |
| 861 | PSS: 2701MHz power 45000 control 0x2500 status 0x2500 |
| 862 | PSS: 2700MHz power 45000 control 0x1b00 status 0x1b00 |
| 863 | PSS: 2400MHz power 38601 control 0x1800 status 0x1800 |
| 864 | PSS: 2200MHz power 34542 control 0x1600 status 0x1600 |
| 865 | PSS: 2000MHz power 30669 control 0x1400 status 0x1400 |
| 866 | PSS: 1800MHz power 26973 control 0x1200 status 0x1200 |
| 867 | PSS: 1600MHz power 23389 control 0x1000 status 0x1000 |
| 868 | PSS: 1400MHz power 19976 control 0xe00 status 0xe00 |
| 869 | PSS: 1200MHz power 16703 control 0xc00 status 0xc00 |
| 870 | PSS: 2701MHz power 45000 control 0x2500 status 0x2500 |
| 871 | PSS: 2700MHz power 45000 control 0x1b00 status 0x1b00 |
| 872 | PSS: 2400MHz power 38601 control 0x1800 status 0x1800 |
| 873 | PSS: 2200MHz power 34542 control 0x1600 status 0x1600 |
| 874 | PSS: 2000MHz power 30669 control 0x1400 status 0x1400 |
| 875 | PSS: 1800MHz power 26973 control 0x1200 status 0x1200 |
| 876 | PSS: 1600MHz power 23389 control 0x1000 status 0x1000 |
| 877 | PSS: 1400MHz power 19976 control 0xe00 status 0xe00 |
| 878 | PSS: 1200MHz power 16703 control 0xc00 status 0xc00 |
| 879 | PSS: 2701MHz power 45000 control 0x2500 status 0x2500 |
| 880 | PSS: 2700MHz power 45000 control 0x1b00 status 0x1b00 |
| 881 | PSS: 2400MHz power 38601 control 0x1800 status 0x1800 |
| 882 | PSS: 2200MHz power 34542 control 0x1600 status 0x1600 |
| 883 | PSS: 2000MHz power 30669 control 0x1400 status 0x1400 |
| 884 | PSS: 1800MHz power 26973 control 0x1200 status 0x1200 |
| 885 | PSS: 1600MHz power 23389 control 0x1000 status 0x1000 |
| 886 | PSS: 1400MHz power 19976 control 0xe00 status 0xe00 |
| 887 | PSS: 1200MHz power 16703 control 0xc00 status 0xc00 |
| 888 | PSS: 2701MHz power 45000 control 0x2500 status 0x2500 |
| 889 | PSS: 2700MHz power 45000 control 0x1b00 status 0x1b00 |
| 890 | PSS: 2400MHz power 38601 control 0x1800 status 0x1800 |
| 891 | PSS: 2200MHz power 34542 control 0x1600 status 0x1600 |
| 892 | PSS: 2000MHz power 30669 control 0x1400 status 0x1400 |
| 893 | PSS: 1800MHz power 26973 control 0x1200 status 0x1200 |
| 894 | PSS: 1600MHz power 23389 control 0x1000 status 0x1000 |
| 895 | PSS: 1400MHz power 19976 control 0xe00 status 0xe00 |
| 896 | PSS: 1200MHz power 16703 control 0xc00 status 0xc00 |
| 897 | PSS: 2701MHz power 45000 control 0x2500 status 0x2500 |
| 898 | PSS: 2700MHz power 45000 control 0x1b00 status 0x1b00 |
| 899 | PSS: 2400MHz power 38601 control 0x1800 status 0x1800 |
| 900 | PSS: 2200MHz power 34542 control 0x1600 status 0x1600 |
| 901 | PSS: 2000MHz power 30669 control 0x1400 status 0x1400 |
| 902 | PSS: 1800MHz power 26973 control 0x1200 status 0x1200 |
| 903 | PSS: 1600MHz power 23389 control 0x1000 status 0x1000 |
| 904 | PSS: 1400MHz power 19976 control 0xe00 status 0xe00 |
| 905 | PSS: 1200MHz power 16703 control 0xc00 status 0xc00 |
| 906 | PSS: 2701MHz power 45000 control 0x2500 status 0x2500 |
| 907 | PSS: 2700MHz power 45000 control 0x1b00 status 0x1b00 |
| 908 | PSS: 2400MHz power 38601 control 0x1800 status 0x1800 |
| 909 | PSS: 2200MHz power 34542 control 0x1600 status 0x1600 |
| 910 | PSS: 2000MHz power 30669 control 0x1400 status 0x1400 |
| 911 | PSS: 1800MHz power 26973 control 0x1200 status 0x1200 |
| 912 | PSS: 1600MHz power 23389 control 0x1000 status 0x1000 |
| 913 | PSS: 1400MHz power 19976 control 0xe00 status 0xe00 |
| 914 | PSS: 1200MHz power 16703 control 0xc00 status 0xc00 |
| 915 | PSS: 2701MHz power 45000 control 0x2500 status 0x2500 |
| 916 | PSS: 2700MHz power 45000 control 0x1b00 status 0x1b00 |
| 917 | PSS: 2400MHz power 38601 control 0x1800 status 0x1800 |
| 918 | PSS: 2200MHz power 34542 control 0x1600 status 0x1600 |
| 919 | PSS: 2000MHz power 30669 control 0x1400 status 0x1400 |
| 920 | PSS: 1800MHz power 26973 control 0x1200 status 0x1200 |
| 921 | PSS: 1600MHz power 23389 control 0x1000 status 0x1000 |
| 922 | PSS: 1400MHz power 19976 control 0xe00 status 0xe00 |
| 923 | PSS: 1200MHz power 16703 control 0xc00 status 0xc00 |
| 924 | PSS: 2701MHz power 45000 control 0x2500 status 0x2500 |
| 925 | PSS: 2700MHz power 45000 control 0x1b00 status 0x1b00 |
| 926 | PSS: 2400MHz power 38601 control 0x1800 status 0x1800 |
| 927 | PSS: 2200MHz power 34542 control 0x1600 status 0x1600 |
| 928 | PSS: 2000MHz power 30669 control 0x1400 status 0x1400 |
| 929 | PSS: 1800MHz power 26973 control 0x1200 status 0x1200 |
| 930 | PSS: 1600MHz power 23389 control 0x1000 status 0x1000 |
| 931 | PSS: 1400MHz power 19976 control 0xe00 status 0xe00 |
| 932 | PSS: 1200MHz power 16703 control 0xc00 status 0xc00 |
| 933 | ACPI: * H8 |
| 934 | H8: BDC not installed |
| 935 | H8: WWAN installed |
| 936 | \_SB.PCI0.LPCB.TPM: LPC TPM PNP: 0c31.0 |
| 937 | \_SB.PCI0.RP02.WF00: PCI: 02:00.0 |
| 938 | ACPI: added table 2/32, length now 44 |
| 939 | ACPI: * MCFG |
| 940 | ACPI: added table 3/32, length now 48 |
| 941 | ACPI: * TCPA |
| 942 | TCPA log created at 7ff3e000 |
| 943 | ACPI: added table 4/32, length now 52 |
| 944 | ACPI: * MADT |
| 945 | ACPI: added table 5/32, length now 56 |
| 946 | current = 7ff55ea0 |
| 947 | ACPI: * DMAR |
| 948 | ACPI: added table 6/32, length now 60 |
| 949 | current = 7ff55f70 |
| 950 | ACPI: * HPET |
| 951 | ACPI: added table 7/32, length now 64 |
| 952 | CBFS: 'Master Header Locator' located CBFS at [610200:c00000) |
| 953 | CBFS: Locating 'vbt.bin' |
| 954 | CBFS: Found @ offset 31580 size 581 |
| 955 | Found a VBT of 4459 bytes after decompression |
| 956 | GMA: Found VBT in CBFS |
| 957 | GMA: Found valid VBT in CBFS |
| 958 | ACPI: done. |
| 959 | ACPI tables: 36784 bytes. |
| 960 | smbios_write_tables: 7ff3d000 |
| 961 | Create SMBIOS type 17 |
| 962 | PCI: 02:00.0 (unknown) |
| 963 | SMBIOS tables: 918 bytes. |
| 964 | Writing table forward entry at 0x00000500 |
| 965 | Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4fe7 |
| 966 | Writing coreboot table at 0x7ff73000 |
| 967 | CBFS: 'Master Header Locator' located CBFS at [610200:c00000) |
| 968 | CBFS: Locating 'cmos_layout.bin' |
| 969 | CBFS: Found @ offset 31b40 size 79c |
| 970 | 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES |
| 971 | 1. 0000000000001000-000000000009ffff: RAM |
| 972 | 2. 00000000000a0000-00000000000fffff: RESERVED |
| 973 | 3. 0000000000100000-000000007ff3cfff: RAM |
| 974 | 4. 000000007ff3d000-000000007ff8bfff: CONFIGURATION TABLES |
| 975 | 5. 000000007ff8c000-000000007ffd1fff: RAMSTAGE |
| 976 | 6. 000000007ffd2000-000000007fffffff: CONFIGURATION TABLES |
| 977 | 7. 0000000080000000-00000000829fffff: RESERVED |
| 978 | 8. 00000000f0000000-00000000f3ffffff: RESERVED |
| 979 | 9. 00000000fed40000-00000000fed44fff: RESERVED |
| 980 | 10. 00000000fed90000-00000000fed91fff: RESERVED |
| 981 | 11. 0000000100000000-000000027b5fffff: RAM |
| 982 | CBFS: 'Master Header Locator' located CBFS at [610200:c00000) |
| 983 | Wrote coreboot table at: 7ff73000, 0xb40 bytes, checksum 1e96 |
| 984 | coreboot table: 2904 bytes. |
| 985 | IMD ROOT 0. 7ffff000 00001000 |
| 986 | IMD SMALL 1. 7fffe000 00001000 |
| 987 | CONSOLE 2. 7ffde000 00020000 |
| 988 | TIME STAMP 3. 7ffdd000 00000910 |
| 989 | ROMSTG STCK 4. 7ffdc000 00001000 |
| 990 | AFTER CAR 5. 7ffd2000 0000a000 |
| 991 | RAMSTAGE 6. 7ff8b000 00047000 |
| 992 | SMM BACKUP 7. 7ff7b000 00010000 |
| 993 | COREBOOT 8. 7ff73000 00008000 |
| 994 | ACPI 9. 7ff4f000 00024000 |
| 995 | ACPI GNVS 10. 7ff4e000 00001000 |
| 996 | TCPA TCGLOG11. 7ff3e000 00010000 |
| 997 | SMBIOS 12. 7ff3d000 00000800 |
| 998 | IMD small region: |
| 999 | IMD ROOT 0. 7fffec00 00000400 |
| 1000 | FMAP 1. 7fffeb20 000000e0 |
| 1001 | MEM INFO 2. 7fffe960 000001b9 |
| 1002 | ROMSTAGE 3. 7fffe940 00000004 |
| 1003 | COREBOOTFWD 4. 7fffe900 00000028 |
| 1004 | BS: BS_WRITE_TABLES times (us): entry 0 run 26719 exit 0 |
| 1005 | POST: 0x7a |
| 1006 | CBFS: 'Master Header Locator' located CBFS at [610200:c00000) |
| 1007 | CBFS: Locating 'fallback/payload' |
| 1008 | CBFS: Found @ offset 4a380 size 106f4 |
| 1009 | Checking segment from ROM address 0xffa5a5b8 |
| 1010 | Payload being loaded at below 1MiB without region being marked as RAM usable. |
| 1011 | Checking segment from ROM address 0xffa5a5d4 |
| 1012 | Loading segment from ROM address 0xffa5a5b8 |
| 1013 | code (compression=1) |
| 1014 | New segment dstaddr 0x000e0d20 memsize 0x1f2e0 srcaddr 0xffa5a5f0 filesize 0x106bc |
| 1015 | Loading Segment: addr: 0x000e0d20 memsz: 0x000000000001f2e0 filesz: 0x00000000000106bc |
| 1016 | using LZMA |
| 1017 | Loading segment from ROM address 0xffa5a5d4 |
| 1018 | Entry Point 0x000fd274 |
| 1019 | BS: BS_PAYLOAD_LOAD times (us): entry 0 run 26918 exit 0 |
| 1020 | POST: 0x7b |
| 1021 | ICH-NM10-PCH: watchdog disabled |
| 1022 | Jumping to boot code at 000fd274(7ff73000) |
| 1023 | POST: 0xf8 |
| 1024 | SeaBIOS (version rel-1.12.1-0-ga5cab58) |
| 1025 | BUILD: gcc: (coreboot toolchain vf5fa96f9c3 2019-09-21) 8.3.0 binutils: (GNU Binutils) 2.32 |
| 1026 | Found coreboot cbmem console @ 7ffde000 |
| 1027 | Found mainboard LENOVO ThinkPad T430 |
| 1028 | Relocating init from 0x000e2380 to 0x7fef0580 (size 51680) |
| 1029 | Found CBFS header at 0xffa10238 |
| 1030 | multiboot: eax=7ffbc5e0, ebx=7ffbc594 |
| 1031 | Found 16 PCI devices (max PCI bus is 03) |
| 1032 | Copying SMBIOS entry point from 0x7ff3d000 to 0x000f67a0 |
| 1033 | Copying ACPI RSDP from 0x7ff4f000 to 0x000f6770 |
| 1034 | Using pmtimer, ioport 0x508 |
| 1035 | Scan for VGA option rom |
| 1036 | Running option rom at c000:0003 |
| 1037 | Turning on vga text mode console |
| 1038 | SeaBIOS (version rel-1.12.1-0-ga5cab58) |
| 1039 | Machine UUID 5bf15e81-52be-11cb-aaba-9be2c2d005a0 |
| 1040 | XHCI init on dev 00:14.0: regs @ 0xe1620000, 8 ports, 32 slots, 32 byte contexts |
| 1041 | XHCI protocol USB 2.00, 4 ports (offset 1), def 3001 |
| 1042 | XHCI protocol USB 3.00, 4 ports (offset 5), def 1000 |
| 1043 | XHCI extcap 0xc1 @ 0xe1628040 |
| 1044 | XHCI extcap 0xc0 @ 0xe1628070 |
| 1045 | XHCI extcap 0x1 @ 0xe1628330 |
| 1046 | EHCI init on dev 00:1a.0 (regs=0xe1636020) |
| 1047 | EHCI init on dev 00:1d.0 (regs=0xe1637020) |
| 1048 | AHCI controller at 00:1f.2, iobase 0xe1635000, irq 10 |
| 1049 | Searching bootorder for: /pci@i0cf8/pci-bridge@1c/*@0 |
| 1050 | Discarding ps2 data aa (status=11) |
| 1051 | Found 0 lpt ports |
| 1052 | Found 0 serial ports |
| 1053 | Searching bootorder for: /pci@i0cf8/*@1f,2/drive@0/disk@0 |
| 1054 | AHCI/0: Set transfer mode to UDMA-6 |
| 1055 | AHCI/0: registering: "AHCI/0: Samsung SSD 840 EVO 120GB ATA-9 Hard-Disk (111 GiBytes)" |
| 1056 | XHCI no devices found |
| 1057 | USB keyboard initialized |
| 1058 | PS2 keyboard initialized |
| 1059 | Initialized USB HUB (0 ports used) |
| 1060 | Initialized USB HUB (1 ports used) |
| 1061 | Initialized USB HUB (1 ports used) |
| 1062 | Searching bootorder for: /pci@i0cf8/*@1f,2/drive@1/disk@0 |
| 1063 | AHCI/1: Set transfer mode to UDMA-6 |
| 1064 | AHCI/1: registering: "AHCI/1: HGST HTS541010A9E680 ATA-8 Hard-Disk (931 GiBytes)" |
| 1065 | WARNING - Timeout at ehci_wait_td:517! |
| 1066 | ehci pipe=0x7fee8a80 cur=7fee1dc0 tok=80080d80 next=7fee1e00 td=0x7fee1dc0 status=80080d80 |
| 1067 | Initialized USB HUB (0 ports used) |
| 1068 | All threads complete. |
| 1069 | Scan for option roms |
| 1070 | |
| 1071 | Press ESC for boot menu. |
| 1072 | |
| 1073 | Searching bootorder for: HALT |
| 1074 | drive 0x000f6700: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=234441648 |
| 1075 | drive 0x000f66b0: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=1953525168 |
| 1076 | Space available for UMB: d0000-eb800, f5fc0-f66b0 |
| 1077 | Returned 180224 bytes of ZoneHigh |
| 1078 | e820 map has 9 items: |
| 1079 | 0: 0000000000000000 - 000000000009fc00 = 1 RAM |
| 1080 | 1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED |
| 1081 | 2: 00000000000f0000 - 0000000000100000 = 2 RESERVED |
| 1082 | 3: 0000000000100000 - 000000007ff29000 = 1 RAM |
| 1083 | 4: 000000007ff29000 - 0000000082a00000 = 2 RESERVED |
| 1084 | 5: 00000000f0000000 - 00000000f4000000 = 2 RESERVED |
| 1085 | 6: 00000000fed40000 - 00000000fed45000 = 2 RESERVED |
| 1086 | 7: 00000000fed90000 - 00000000fed92000 = 2 RESERVED |
| 1087 | 8: 0000000100000000 - 000000027b600000 = 1 RAM |
| 1088 | enter handle_19: |
| 1089 | NULL |
| 1090 | Booting from Hard Disk... |
| 1091 | Booting from 0000:7c00 |
| 1092 | |