blob: a00156def923d715be9321724057697adbed8425 [file] [log] [blame]
coreboot-4.7-919-g621abec1e8 Sun Apr 29 18:26:46 UTC 2018 romstage starting...
APIC 00: CPU Family_Model = 00500f20
APIC 00: ** Enter AmdInitReset [00020007]
AmdInitReset() returned AGESA_SUCCESS
APIC 00: Heap in LocalCache (2) at 0x00400000
APIC 00: ** Exit AmdInitReset [00020007]
APIC 00: ** Enter AmdInitEarly [00020002]
AmdInitEarly() returned AGESA_SUCCESS
APIC 00: Heap in LocalCache (2) at 0x00400000
APIC 00: ** Exit AmdInitEarly [00020002]
Timestamp - before ram initialization: 732084147
APIC 00: ** Enter AmdInitPost [00020006]
CBFS: 'Master Header Locator' located CBFS at [200:1fffc0)
CBFS: Locating 'spd.bin'
CBFS: Found @ offset 52340 size 100
AmdInitPost() returned AGESA_WARNING
EventLog: EventClass = 4, EventInfo = 4012200.
Param1 = 0, Param2 = 0.
Param3 = 0, Param4 = 0.
APIC 00: Heap in TempMem (3) at 0x000b0000
APIC 00: ** Exit AmdInitPost [00020006]
Timestamp - after ram initialization: 858594877
CBMEM:
IMD: root @ dffff000 254 entries.
IMD: root @ dfffec00 62 entries.
Timestamp - start of romstage: 194238
Timestamp - before ram initialization: 162353740
Timestamp - after ram initialization: 837927581
MTRR Range: Start=0 End=80000000 (Size 80000000)
MTRR Range: Start=80000000 End=c0000000 (Size 40000000)
MTRR Range: Start=c0000000 End=e0000000 (Size 20000000)
MTRR Range: Start=ffe00000 End=0 (Size 200000)
CBFS: 'Master Header Locator' located CBFS at [200:1fffc0)
CBFS: Locating 'fallback/postcar'
CBFS: Found @ offset 4a840 size 5390
Decompressing stage fallback/postcar @ 0xdffbafc0 (37680 bytes)
Loading module at dffbb000 with entry dffbb000. filesize: 0x5058 memsize: 0x92f0
Processing 183 relocs. Offset value of 0xddfbb000
coreboot-4.7-919-g621abec1e8 Sun Apr 29 18:26:46 UTC 2018 postcar starting...
Timestamp - end of romstage: 949850084
CBFS: 'Master Header Locator' located CBFS at [200:1fffc0)
CBFS: Locating 'fallback/ramstage'
CBFS: Found @ offset 2dbc0 size 1c335
Timestamp - starting to load ramstage: 965087341
Decompressing stage fallback/ramstage @ 0xdfeacfc0 (1058872 bytes)
Timestamp - starting LZMA decompress (ignore for x86): 975373490
Timestamp - finished LZMA decompress (ignore for x86): 1050108831
Loading module at dfead000 with entry dfead000. filesize: 0x3ade8 memsize: 0x1027f8
Processing 3343 relocs. Offset value of 0xdfdad000
Timestamp - finished loading ramstage: 1069098865
coreboot-4.7-919-g621abec1e8 Sun Apr 29 18:26:46 UTC 2018 ramstage starting...
Timestamp - start of ramstage: 1081135879
Normal boot.
APIC 00: ** Enter AmdInitEnv [00020003]
Wiped HEAP at [10000000 - 1002ffff]
AmdInitEnv() returned AGESA_SUCCESS
APIC 00: Heap in SystemMem (4) at 0x10000014
APIC 00: ** Exit AmdInitEnv [00020003]
BS: BS_PRE_DEVICE times (us): entry 23016 run 0 exit 0
Timestamp - device enumeration: 1114006835
SB800: sb800_init
SB800 - Smbus.c - alink_ab_indx - Start.
SB800 - Smbus.c - alink_ab_indx - End.
BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 12657 exit 0
Enumerating buses...
Show all devs... Before device enumeration.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 0
PCI: 00:04.0: enabled 1
PCI: 00:05.0: enabled 1
PCI: 00:06.0: enabled 1
PCI: 00:07.0: enabled 1
PCI: 00:08.0: enabled 1
PCI: 00:11.0: enabled 1
PCI: 00:12.0: enabled 1
PCI: 00:12.2: enabled 1
PCI: 00:13.0: enabled 1
PCI: 00:13.2: enabled 1
PCI: 00:14.0: enabled 1
PCI: 00:14.1: enabled 0
PCI: 00:14.2: enabled 0
PCI: 00:14.3: enabled 1
PNP: 002e.0: enabled 0
PNP: 002e.2: enabled 1
PNP: 002e.3: enabled 1
PNP: 002e.10: enabled 0
PNP: 002e.11: enabled 0
PNP: 002e.8: enabled 0
PNP: 002e.f: enabled 0
PNP: 002e.7: enabled 0
PNP: 002e.107: enabled 0
PNP: 002e.607: enabled 0
PNP: 002e.e: enabled 0
PCI: 00:14.4: enabled 1
PCI: 00:14.5: enabled 0
PCI: 00:15.0: enabled 1
PCI: 00:15.1: enabled 0
PCI: 00:15.2: enabled 0
PCI: 00:15.3: enabled 0
PCI: 00:16.0: enabled 1
PCI: 00:16.2: enabled 1
PCI: 00:18.0: enabled 1
PCI: 00:18.1: enabled 1
PCI: 00:18.2: enabled 1
PCI: 00:18.3: enabled 1
PCI: 00:18.4: enabled 1
PCI: 00:18.5: enabled 1
PCI: 00:18.6: enabled 1
PCI: 00:18.7: enabled 1
Compare with tree...
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 0
PCI: 00:04.0: enabled 1
PCI: 00:05.0: enabled 1
PCI: 00:06.0: enabled 1
PCI: 00:07.0: enabled 1
PCI: 00:08.0: enabled 1
PCI: 00:11.0: enabled 1
PCI: 00:12.0: enabled 1
PCI: 00:12.2: enabled 1
PCI: 00:13.0: enabled 1
PCI: 00:13.2: enabled 1
PCI: 00:14.0: enabled 1
PCI: 00:14.1: enabled 0
PCI: 00:14.2: enabled 0
PCI: 00:14.3: enabled 1
PNP: 002e.0: enabled 0
PNP: 002e.2: enabled 1
PNP: 002e.3: enabled 1
PNP: 002e.10: enabled 0
PNP: 002e.11: enabled 0
PNP: 002e.8: enabled 0
PNP: 002e.f: enabled 0
PNP: 002e.7: enabled 0
PNP: 002e.107: enabled 0
PNP: 002e.607: enabled 0
PNP: 002e.e: enabled 0
PCI: 00:14.4: enabled 1
PCI: 00:14.5: enabled 0
PCI: 00:15.0: enabled 1
PCI: 00:15.1: enabled 0
PCI: 00:15.2: enabled 0
PCI: 00:15.3: enabled 0
PCI: 00:16.0: enabled 1
PCI: 00:16.2: enabled 1
PCI: 00:18.0: enabled 1
PCI: 00:18.1: enabled 1
PCI: 00:18.2: enabled 1
PCI: 00:18.3: enabled 1
PCI: 00:18.4: enabled 1
PCI: 00:18.5: enabled 1
PCI: 00:18.6: enabled 1
PCI: 00:18.7: enabled 1
Mainboard APU1 Enable.
Root Device scanning...
root_dev_scan_bus for Root Device
setup_bsp_ramtop, TOP MEM: msr.lo = 0xe0000000, msr.hi = 0x00000000
setup_bsp_ramtop, TOP MEM2: msr.lo = 0x1f000000, msr.hi = 0x00000001
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
CPU_CLUSTER: 0 scanning...
AP siblings=1
CPU: APIC: 00 enabled
CPU: APIC: 01 enabled
scan_bus: scanning of bus CPU_CLUSTER: 0 took 7964 usecs
DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
PCI: 00:00.0 [1022/1510] ops
PCI: 00:00.0 [1022/1510] enabled
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:04.0 subordinate bus PCI Express
PCI: 00:04.0 [1022/1512] enabled
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:05.0 subordinate bus PCI Express
PCI: 00:05.0 [1022/1513] enabled
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:06.0 subordinate bus PCI Express
PCI: 00:06.0 [1022/1514] enabled
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x05 @ 0xa0
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:07.0 subordinate bus PCI Express
PCI: 00:07.0 [1022/1515] enabled
PCI: Static device PCI: 00:08.0 not found, disabling it.
PCI: 00:11.0 [1002/4390] enabled
PCI: 00:12.0 [1002/4397] ops
PCI: 00:12.0 [1002/4397] enabled
PCI: 00:12.2 [1002/4396] ops
PCI: 00:12.2 [1002/4396] enabled
PCI: 00:13.0 [1002/4397] ops
PCI: 00:13.0 [1002/4397] enabled
PCI: 00:13.2 [1002/4396] ops
PCI: 00:13.2 [1002/4396] enabled
IOAPIC: Clearing IOAPIC at fec00000
IOAPIC: 24 interrupts
IOAPIC: reg 0x00000000 value 0x00000000 0x00010000
IOAPIC: reg 0x00000001 value 0x00000000 0x00010000
IOAPIC: reg 0x00000002 value 0x00000000 0x00010000
IOAPIC: reg 0x00000003 value 0x00000000 0x00010000
IOAPIC: reg 0x00000004 value 0x00000000 0x00010000
IOAPIC: reg 0x00000005 value 0x00000000 0x00010000
IOAPIC: reg 0x00000006 value 0x00000000 0x00010000
IOAPIC: reg 0x00000007 value 0x00000000 0x00010000
IOAPIC: reg 0x00000008 value 0x00000000 0x00010000
IOAPIC: reg 0x00000009 value 0x00000000 0x00010000
IOAPIC: reg 0x0000000a value 0x00000000 0x00010000
IOAPIC: reg 0x0000000b value 0x00000000 0x00010000
IOAPIC: reg 0x0000000c value 0x00000000 0x00010000
IOAPIC: reg 0x0000000d value 0x00000000 0x00010000
IOAPIC: reg 0x0000000e value 0x00000000 0x00010000
IOAPIC: reg 0x0000000f value 0x00000000 0x00010000
IOAPIC: reg 0x00000010 value 0x00000000 0x00010000
IOAPIC: reg 0x00000011 value 0x00000000 0x00010000
IOAPIC: reg 0x00000012 value 0x00000000 0x00010000
IOAPIC: reg 0x00000013 value 0x00000000 0x00010000
IOAPIC: reg 0x00000014 value 0x00000000 0x00010000
IOAPIC: reg 0x00000015 value 0x00000000 0x00010000
IOAPIC: reg 0x00000016 value 0x00000000 0x00010000
IOAPIC: reg 0x00000017 value 0x00000000 0x00010000
IOAPIC: Initializing IOAPIC at 0xfec00000
IOAPIC: Bootstrap Processor Local APIC = 0x00
IOAPIC: ID = 0x02
IOAPIC: Dumping registers
reg 0x0000: 0x02000000
reg 0x0001: 0x00178021
reg 0x0002: 0x02000000
IOAPIC: 24 interrupts
IOAPIC: Enabling interrupts on FSB
IOAPIC: reg 0x00000000 value 0x00000000 0x00000700
IOAPIC: reg 0x00000001 value 0x00000000 0x00010000
IOAPIC: reg 0x00000002 value 0x00000000 0x00010000
IOAPIC: reg 0x00000003 value 0x00000000 0x00010000
IOAPIC: reg 0x00000004 value 0x00000000 0x00010000
IOAPIC: reg 0x00000005 value 0x00000000 0x00010000
IOAPIC: reg 0x00000006 value 0x00000000 0x00010000
IOAPIC: reg 0x00000007 value 0x00000000 0x00010000
IOAPIC: reg 0x00000008 value 0x00000000 0x00010000
IOAPIC: reg 0x00000009 value 0x00000000 0x00010000
IOAPIC: reg 0x0000000a value 0x00000000 0x00010000
IOAPIC: reg 0x0000000b value 0x00000000 0x00010000
IOAPIC: reg 0x0000000c value 0x00000000 0x00010000
IOAPIC: reg 0x0000000d value 0x00000000 0x00010000
IOAPIC: reg 0x0000000e value 0x00000000 0x00010000
IOAPIC: reg 0x0000000f value 0x00000000 0x00010000
IOAPIC: reg 0x00000010 value 0x00000000 0x00010000
IOAPIC: reg 0x00000011 value 0x00000000 0x00010000
IOAPIC: reg 0x00000012 value 0x00000000 0x00010000
IOAPIC: reg 0x00000013 value 0x00000000 0x00010000
IOAPIC: reg 0x00000014 value 0x00000000 0x00010000
IOAPIC: reg 0x00000015 value 0x00000000 0x00010000
IOAPIC: reg 0x00000016 value 0x00000000 0x00010000
IOAPIC: reg 0x00000017 value 0x00000000 0x00010000
PCI: 00:14.0 [1002/4385] enabled
PCI: 00:14.3 [1002/439d] bus ops
PCI: 00:14.3 [1002/439d] enabled
PCI: 00:14.4 [1002/4384] enabled
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:15.0 subordinate bus PCI Express
PCI: 00:15.0 [1002/43a0] enabled
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:15.1 subordinate bus PCI Express
PCI: 00:15.1 [1002/43a1] disabled
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:15.2 subordinate bus PCI Express
PCI: 00:15.2 [1002/43a2] disabled
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Capability: type 0x0d @ 0xb0
Capability: type 0x08 @ 0xb8
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
PCI: 00:15.3 subordinate bus PCI Express
PCI: 00:15.3 [1002/43a3] disabled
PCI: 00:16.0 [1002/4397] ops
PCI: 00:16.0 [1002/4397] enabled
SB800: sb_Before_Pci_Init
PCI: 00:16.2 [1002/4396] ops
PCI: 00:16.2 [1002/4396] enabled
PCI: 00:18.0 [1022/1700] enabled
PCI: 00:18.1 [1022/1701] enabled
PCI: 00:18.2 [1022/1702] enabled
PCI: 00:18.3 [1022/1703] enabled
PCI: 00:18.4 [1022/1704] enabled
PCI: 00:18.5 [1022/1718] enabled
PCI: 00:18.6 [1022/1716] enabled
PCI: 00:18.7 [1022/1719] enabled
PCI: 00:04.0 scanning...
do_pci_scan_bridge for PCI: 00:04.0
PCI: pci_scan_bus for bus 01
PCI: 01:00.0 [10ec/8168] enabled
Capability: type 0x01 @ 0x40
Capability: type 0x05 @ 0x50
Capability: type 0x10 @ 0x70
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Enabling Common Clock Configuration
ASPM: Enabled L0s and L1
Capability: type 0x01 @ 0x40
Capability: type 0x05 @ 0x50
Capability: type 0x10 @ 0x70
Failed to enable LTR for dev = PCI: 01:00.0
scan_bus: scanning of bus PCI: 00:04.0 took 41675 usecs
PCI: 00:05.0 scanning...
do_pci_scan_bridge for PCI: 00:05.0
PCI: pci_scan_bus for bus 02
PCI: 02:00.0 [10ec/8168] enabled
Capability: type 0x01 @ 0x40
Capability: type 0x05 @ 0x50
Capability: type 0x10 @ 0x70
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Enabling Common Clock Configuration
ASPM: Enabled L0s and L1
Capability: type 0x01 @ 0x40
Capability: type 0x05 @ 0x50
Capability: type 0x10 @ 0x70
Failed to enable LTR for dev = PCI: 02:00.0
scan_bus: scanning of bus PCI: 00:05.0 took 41669 usecs
PCI: 00:06.0 scanning...
do_pci_scan_bridge for PCI: 00:06.0
PCI: pci_scan_bus for bus 03
PCI: 03:00.0 [10ec/8168] enabled
Capability: type 0x01 @ 0x40
Capability: type 0x05 @ 0x50
Capability: type 0x10 @ 0x70
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Enabling Common Clock Configuration
ASPM: Enabled L0s and L1
Capability: type 0x01 @ 0x40
Capability: type 0x05 @ 0x50
Capability: type 0x10 @ 0x70
Failed to enable LTR for dev = PCI: 03:00.0
scan_bus: scanning of bus PCI: 00:06.0 took 41668 usecs
PCI: 00:07.0 scanning...
do_pci_scan_bridge for PCI: 00:07.0
PCI: pci_scan_bus for bus 04
PCI: 04:00.0 [168c/002a] enabled
Capability: type 0x01 @ 0x40
Capability: type 0x05 @ 0x50
Capability: type 0x10 @ 0x60
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Enabling Common Clock Configuration
PCIE CLK PM is not supported by endpoint
ASPM: Enabled L1
Capability: type 0x01 @ 0x40
Capability: type 0x05 @ 0x50
Capability: type 0x10 @ 0x60
Failed to enable LTR for dev = PCI: 04:00.0
scan_bus: scanning of bus PCI: 00:07.0 took 44614 usecs
PCI: 00:14.3 scanning...
scan_lpc_bus for PCI: 00:14.3
PNP: 002e.0 disabled
PNP: 002e.2 enabled
PNP: 002e.3 enabled
PNP: 002e.10 disabled
PNP: 002e.11 disabled
PNP: 002e.8 disabled
PNP: 002e.f disabled
PNP: 002e.7 disabled
PNP: 002e.107 disabled
PNP: 002e.607 disabled
PNP: 002e.e disabled
PNP: 002e.14 enabled
scan_lpc_bus for PCI: 00:14.3 done
scan_bus: scanning of bus PCI: 00:14.3 took 31850 usecs
PCI: 00:14.4 scanning...
do_pci_scan_bridge for PCI: 00:14.4
PCI: pci_scan_bus for bus 05
scan_bus: scanning of bus PCI: 00:14.4 took 8182 usecs
PCI: 00:15.0 scanning...
do_pci_scan_bridge for PCI: 00:15.0
PCI: pci_scan_bus for bus 06
PCI: 06:00.0 [168c/002b] enabled
Capability: type 0x01 @ 0x40
Capability: type 0x05 @ 0x50
Capability: type 0x10 @ 0x60
Capability: type 0x01 @ 0x50
Capability: type 0x10 @ 0x58
Enabling Common Clock Configuration
PCIE CLK PM is not supported by endpoint
ASPM: Enabled L0s and L1
Capability: type 0x01 @ 0x40
Capability: type 0x05 @ 0x50
Capability: type 0x10 @ 0x60
Failed to enable LTR for dev = PCI: 06:00.0
scan_bus: scanning of bus PCI: 00:15.0 took 45378 usecs
scan_bus: scanning of bus DOMAIN: 0000 took 954323 usecs
root_dev_scan_bus for Root Device done
scan_bus: scanning of bus Root Device took 997210 usecs
done
BS: BS_DEV_ENUMERATE times (us): entry 0 run 1225240 exit 0
Timestamp - device configuration: 2362438847
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
Fam14h - domain_read_resources
DOMAIN: 0000 read_resources bus 0 link: 0
Fam14h - nb_read_resources
Adding PCIe enhanced config space BAR 0xf8000000-0xfc000000.
PCI: 00:04.0 read_resources bus 1 link: 0
PCI: 00:04.0 read_resources bus 1 link: 0 done
PCI: 00:05.0 read_resources bus 2 link: 0
PCI: 00:05.0 read_resources bus 2 link: 0 done
PCI: 00:06.0 read_resources bus 3 link: 0
PCI: 00:06.0 read_resources bus 3 link: 0 done
PCI: 00:07.0 read_resources bus 4 link: 0
PCI: 00:07.0 read_resources bus 4 link: 0 done
SB800 - Lpc.c - lpc_read_resources - Start.
SB800 - Lpc.c - lpc_read_resources - End.
PCI: 00:14.3 read_resources bus 0 link: 0
PCI: 00:14.3 read_resources bus 0 link: 0 done
PCI: 00:14.4 read_resources bus 5 link: 0
PCI: 00:14.4 read_resources bus 5 link: 0 done
PCI: 00:15.0 read_resources bus 6 link: 0
PCI: 00:15.0 read_resources bus 6 link: 0 done
DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
Root Device child on link 0 CPU_CLUSTER: 0
CPU_CLUSTER: 0 child on link 0 APIC: 00
APIC: 00
APIC: 01
DOMAIN: 0000 child on link 0 PCI: 00:00.0
DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
PCI: 00:00.0
PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
PCI: 00:01.0
PCI: 00:04.0 child on link 0 PCI: 01:00.0
PCI: 00:04.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
PCI: 00:04.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:04.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 01:00.0
PCI: 01:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 1201 index 20
PCI: 00:05.0 child on link 0 PCI: 02:00.0
PCI: 00:05.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
PCI: 00:05.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:05.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 02:00.0
PCI: 02:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
PCI: 02:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
PCI: 02:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 1201 index 20
PCI: 00:06.0 child on link 0 PCI: 03:00.0
PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 03:00.0
PCI: 03:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
PCI: 03:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
PCI: 03:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 1201 index 20
PCI: 00:07.0 child on link 0 PCI: 04:00.0
PCI: 00:07.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
PCI: 00:07.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:07.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 04:00.0
PCI: 04:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
PCI: 00:08.0
PCI: 00:11.0
PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
PCI: 00:11.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
PCI: 00:11.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 24
PCI: 00:12.0
PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
PCI: 00:12.2
PCI: 00:12.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
PCI: 00:13.0
PCI: 00:13.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
PCI: 00:13.2
PCI: 00:13.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
PCI: 00:14.0
PCI: 00:14.1
PCI: 00:14.2
PCI: 00:14.3 child on link 0 PNP: 002e.0
PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
PCI: 00:14.3 resource base fec10000 size 400 align 0 gran 0 limit 0 flags e0040200 index 2
PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
PNP: 002e.0
PNP: 002e.0 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60
PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 002e.2
PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 002e.3
PNP: 002e.3 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 002e.10
PNP: 002e.10 resource base 3e8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
PNP: 002e.10 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 002e.11
PNP: 002e.11 resource base 2e8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
PNP: 002e.11 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 002e.8
PNP: 002e.f
PNP: 002e.7
PNP: 002e.107
PNP: 002e.607
PNP: 002e.e
PNP: 002e.14
PCI: 00:14.4
PCI: 00:14.4 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24
PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 00:14.5
PCI: 00:15.0 child on link 0 PCI: 06:00.0
PCI: 00:15.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
PCI: 00:15.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:15.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 06:00.0
PCI: 06:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
PCI: 00:15.1
PCI: 00:15.2
PCI: 00:15.3
PCI: 00:16.0
PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
PCI: 00:16.2
PCI: 00:16.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
PCI: 00:18.0
PCI: 00:18.1
PCI: 00:18.2
PCI: 00:18.3
PCI: 00:18.4
PCI: 00:18.5
PCI: 00:18.6
PCI: 00:18.7
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
PCI: 00:04.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 01:00.0 10 * [0x0 - 0xff] io
PCI: 00:04.0 io: base: 100 size: 1000 align: 12 gran: 12 limit: ffff done
PCI: 00:05.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 02:00.0 10 * [0x0 - 0xff] io
PCI: 00:05.0 io: base: 100 size: 1000 align: 12 gran: 12 limit: ffff done
PCI: 00:06.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 03:00.0 10 * [0x0 - 0xff] io
PCI: 00:06.0 io: base: 100 size: 1000 align: 12 gran: 12 limit: ffff done
PCI: 00:07.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 00:07.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done
PCI: 00:14.4 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:14.4 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:15.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 00:15.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done
PCI: 00:04.0 1c * [0x0 - 0xfff] io
PCI: 00:05.0 1c * [0x1000 - 0x1fff] io
PCI: 00:06.0 1c * [0x2000 - 0x2fff] io
PCI: 00:11.0 20 * [0x3000 - 0x300f] io
PCI: 00:11.0 10 * [0x3010 - 0x3017] io
PCI: 00:11.0 18 * [0x3018 - 0x301f] io
PCI: 00:11.0 14 * [0x3020 - 0x3023] io
PCI: 00:11.0 1c * [0x3024 - 0x3027] io
DOMAIN: 0000 io: base: 3028 size: 3028 align: 12 gran: 0 limit: ffff done
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
PCI: 00:04.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 01:00.0 20 * [0x0 - 0x3fff] prefmem
PCI: 00:04.0 prefmem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:04.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 01:00.0 18 * [0x0 - 0xfff] mem
PCI: 00:04.0 mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:05.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 02:00.0 20 * [0x0 - 0x3fff] prefmem
PCI: 00:05.0 prefmem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:05.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 02:00.0 18 * [0x0 - 0xfff] mem
PCI: 00:05.0 mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:06.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 03:00.0 20 * [0x0 - 0x3fff] prefmem
PCI: 00:06.0 prefmem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:06.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 03:00.0 18 * [0x0 - 0xfff] mem
PCI: 00:06.0 mem: base: 1000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:07.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:07.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:07.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 04:00.0 10 * [0x0 - 0xffff] mem
PCI: 00:07.0 mem: base: 10000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:14.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:14.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:14.4 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:14.4 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:15.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:15.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:15.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 06:00.0 10 * [0x0 - 0xffff] mem
PCI: 00:15.0 mem: base: 10000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:04.0 24 * [0x0 - 0xfffff] prefmem
PCI: 00:04.0 20 * [0x100000 - 0x1fffff] mem
PCI: 00:05.0 24 * [0x200000 - 0x2fffff] prefmem
PCI: 00:05.0 20 * [0x300000 - 0x3fffff] mem
PCI: 00:06.0 24 * [0x400000 - 0x4fffff] prefmem
PCI: 00:06.0 20 * [0x500000 - 0x5fffff] mem
PCI: 00:07.0 20 * [0x600000 - 0x6fffff] mem
PCI: 00:15.0 20 * [0x700000 - 0x7fffff] mem
PCI: 00:12.0 10 * [0x800000 - 0x800fff] mem
PCI: 00:13.0 10 * [0x801000 - 0x801fff] mem
PCI: 00:16.0 10 * [0x802000 - 0x802fff] mem
PCI: 00:11.0 24 * [0x803000 - 0x8033ff] mem
PCI: 00:12.2 10 * [0x804000 - 0x8040ff] mem
PCI: 00:13.2 10 * [0x805000 - 0x8050ff] mem
PCI: 00:16.2 10 * [0x806000 - 0x8060ff] mem
DOMAIN: 0000 mem: base: 806100 size: 806100 align: 20 gran: 0 limit: ffffffff done
avoid_fixed_resources: DOMAIN: 0000
avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
constrain_resources: PCI: 00:00.0 c0010058 base f8000000 limit fbffffff mem (fixed)
constrain_resources: PCI: 00:14.3 10000000 base 00000000 limit 00000fff io (fixed)
avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001000 limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 base f7700000 limit f7ffffff
Setting resources...
DOMAIN: 0000 io: base:1000 size:3028 align:12 gran:0 limit:ffff
PCI: 00:04.0 1c * [0x1000 - 0x1fff] io
PCI: 00:05.0 1c * [0x2000 - 0x2fff] io
PCI: 00:06.0 1c * [0x3000 - 0x3fff] io
PCI: 00:11.0 20 * [0x4000 - 0x400f] io
PCI: 00:11.0 10 * [0x4010 - 0x4017] io
PCI: 00:11.0 18 * [0x4018 - 0x401f] io
PCI: 00:11.0 14 * [0x4020 - 0x4023] io
PCI: 00:11.0 1c * [0x4024 - 0x4027] io
DOMAIN: 0000 io: next_base: 4028 size: 3028 align: 12 gran: 0 done
PCI: 00:04.0 io: base:1000 size:1000 align:12 gran:12 limit:1fff
PCI: 01:00.0 10 * [0x1000 - 0x10ff] io
PCI: 00:04.0 io: next_base: 1100 size: 1000 align: 12 gran: 12 done
PCI: 00:05.0 io: base:2000 size:1000 align:12 gran:12 limit:2fff
PCI: 02:00.0 10 * [0x2000 - 0x20ff] io
PCI: 00:05.0 io: next_base: 2100 size: 1000 align: 12 gran: 12 done
PCI: 00:06.0 io: base:3000 size:1000 align:12 gran:12 limit:3fff
PCI: 03:00.0 10 * [0x3000 - 0x30ff] io
PCI: 00:06.0 io: next_base: 3100 size: 1000 align: 12 gran: 12 done
PCI: 00:07.0 io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:07.0 io: next_base: ffff size: 0 align: 12 gran: 12 done
PCI: 00:14.4 io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:14.4 io: next_base: ffff size: 0 align: 12 gran: 12 done
PCI: 00:15.0 io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:15.0 io: next_base: ffff size: 0 align: 12 gran: 12 done
DOMAIN: 0000 mem: base:f7700000 size:806100 align:20 gran:0 limit:f7ffffff
PCI: 00:04.0 24 * [0xf7700000 - 0xf77fffff] prefmem
PCI: 00:04.0 20 * [0xf7800000 - 0xf78fffff] mem
PCI: 00:05.0 24 * [0xf7900000 - 0xf79fffff] prefmem
PCI: 00:05.0 20 * [0xf7a00000 - 0xf7afffff] mem
PCI: 00:06.0 24 * [0xf7b00000 - 0xf7bfffff] prefmem
PCI: 00:06.0 20 * [0xf7c00000 - 0xf7cfffff] mem
PCI: 00:07.0 20 * [0xf7d00000 - 0xf7dfffff] mem
PCI: 00:15.0 20 * [0xf7e00000 - 0xf7efffff] mem
PCI: 00:12.0 10 * [0xf7f00000 - 0xf7f00fff] mem
PCI: 00:13.0 10 * [0xf7f01000 - 0xf7f01fff] mem
PCI: 00:16.0 10 * [0xf7f02000 - 0xf7f02fff] mem
PCI: 00:11.0 24 * [0xf7f03000 - 0xf7f033ff] mem
PCI: 00:12.2 10 * [0xf7f04000 - 0xf7f040ff] mem
PCI: 00:13.2 10 * [0xf7f05000 - 0xf7f050ff] mem
PCI: 00:16.2 10 * [0xf7f06000 - 0xf7f060ff] mem
DOMAIN: 0000 mem: next_base: f7f06100 size: 806100 align: 20 gran: 0 done
PCI: 00:04.0 prefmem: base:f7700000 size:100000 align:20 gran:20 limit:f77fffff
PCI: 01:00.0 20 * [0xf7700000 - 0xf7703fff] prefmem
PCI: 00:04.0 prefmem: next_base: f7704000 size: 100000 align: 20 gran: 20 done
PCI: 00:04.0 mem: base:f7800000 size:100000 align:20 gran:20 limit:f78fffff
PCI: 01:00.0 18 * [0xf7800000 - 0xf7800fff] mem
PCI: 00:04.0 mem: next_base: f7801000 size: 100000 align: 20 gran: 20 done
PCI: 00:05.0 prefmem: base:f7900000 size:100000 align:20 gran:20 limit:f79fffff
PCI: 02:00.0 20 * [0xf7900000 - 0xf7903fff] prefmem
PCI: 00:05.0 prefmem: next_base: f7904000 size: 100000 align: 20 gran: 20 done
PCI: 00:05.0 mem: base:f7a00000 size:100000 align:20 gran:20 limit:f7afffff
PCI: 02:00.0 18 * [0xf7a00000 - 0xf7a00fff] mem
PCI: 00:05.0 mem: next_base: f7a01000 size: 100000 align: 20 gran: 20 done
PCI: 00:06.0 prefmem: base:f7b00000 size:100000 align:20 gran:20 limit:f7bfffff
PCI: 03:00.0 20 * [0xf7b00000 - 0xf7b03fff] prefmem
PCI: 00:06.0 prefmem: next_base: f7b04000 size: 100000 align: 20 gran: 20 done
PCI: 00:06.0 mem: base:f7c00000 size:100000 align:20 gran:20 limit:f7cfffff
PCI: 03:00.0 18 * [0xf7c00000 - 0xf7c00fff] mem
PCI: 00:06.0 mem: next_base: f7c01000 size: 100000 align: 20 gran: 20 done
PCI: 00:07.0 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:07.0 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:07.0 mem: base:f7d00000 size:100000 align:20 gran:20 limit:f7dfffff
PCI: 04:00.0 10 * [0xf7d00000 - 0xf7d0ffff] mem
PCI: 00:07.0 mem: next_base: f7d10000 size: 100000 align: 20 gran: 20 done
PCI: 00:14.4 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:14.4 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:14.4 mem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:14.4 mem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:15.0 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:15.0 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:15.0 mem: base:f7e00000 size:100000 align:20 gran:20 limit:f7efffff
PCI: 06:00.0 10 * [0xf7e00000 - 0xf7e0ffff] mem
PCI: 00:15.0 mem: next_base: f7e10000 size: 100000 align: 20 gran: 20 done
Root Device assign_resources, bus 0 link: 0
Fam14h - domain_set_resources
amsr - incoming dev = dfee4be0
adsr: (before) basek = 0, limitk = 11effffff.
adsr: (after) basek = 0, limitk = 47bfff, sizek = 47c000.
adsr - 0xa0000 to 0xbffff resource.
adsr: mmio_basek=00380000, basek=00000300, limitk=0047bfff
0: mmio_basek=00380000, basek=00400000, limitk=0047bfff
adsr - mmio_basek = 380000.
DOMAIN: 0000 assign_resources, bus 0 link: 0
Fam14h - nb_set_resources
Fam14h - create_vga_resource
Fam14h - set_resource
PCI: 00:04.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 01 io
PCI: 00:04.0 24 <- [0x00f7700000 - 0x00f77fffff] size 0x00100000 gran 0x14 bus 01 prefmem
PCI: 00:04.0 20 <- [0x00f7800000 - 0x00f78fffff] size 0x00100000 gran 0x14 bus 01 mem
PCI: 00:04.0 assign_resources, bus 1 link: 0
PCI: 01:00.0 10 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io
PCI: 01:00.0 18 <- [0x00f7800000 - 0x00f7800fff] size 0x00001000 gran 0x0c mem64
PCI: 01:00.0 20 <- [0x00f7700000 - 0x00f7703fff] size 0x00004000 gran 0x0e prefmem64
PCI: 00:04.0 assign_resources, bus 1 link: 0
PCI: 00:05.0 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 02 io
PCI: 00:05.0 24 <- [0x00f7900000 - 0x00f79fffff] size 0x00100000 gran 0x14 bus 02 prefmem
PCI: 00:05.0 20 <- [0x00f7a00000 - 0x00f7afffff] size 0x00100000 gran 0x14 bus 02 mem
PCI: 00:05.0 assign_resources, bus 2 link: 0
PCI: 02:00.0 10 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io
PCI: 02:00.0 18 <- [0x00f7a00000 - 0x00f7a00fff] size 0x00001000 gran 0x0c mem64
PCI: 02:00.0 20 <- [0x00f7900000 - 0x00f7903fff] size 0x00004000 gran 0x0e prefmem64
PCI: 00:05.0 assign_resources, bus 2 link: 0
PCI: 00:06.0 1c <- [0x0000003000 - 0x0000003fff] size 0x00001000 gran 0x0c bus 03 io
PCI: 00:06.0 24 <- [0x00f7b00000 - 0x00f7bfffff] size 0x00100000 gran 0x14 bus 03 prefmem
PCI: 00:06.0 20 <- [0x00f7c00000 - 0x00f7cfffff] size 0x00100000 gran 0x14 bus 03 mem
PCI: 00:06.0 assign_resources, bus 3 link: 0
PCI: 03:00.0 10 <- [0x0000003000 - 0x00000030ff] size 0x00000100 gran 0x08 io
PCI: 03:00.0 18 <- [0x00f7c00000 - 0x00f7c00fff] size 0x00001000 gran 0x0c mem64
PCI: 03:00.0 20 <- [0x00f7b00000 - 0x00f7b03fff] size 0x00004000 gran 0x0e prefmem64
PCI: 00:06.0 assign_resources, bus 3 link: 0
PCI: 00:07.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 04 io
PCI: 00:07.0 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 04 prefmem
PCI: 00:07.0 20 <- [0x00f7d00000 - 0x00f7dfffff] size 0x00100000 gran 0x14 bus 04 mem
PCI: 00:07.0 assign_resources, bus 4 link: 0
PCI: 04:00.0 10 <- [0x00f7d00000 - 0x00f7d0ffff] size 0x00010000 gran 0x10 mem64
PCI: 00:07.0 assign_resources, bus 4 link: 0
PCI: 00:11.0 10 <- [0x0000004010 - 0x0000004017] size 0x00000008 gran 0x03 io
PCI: 00:11.0 14 <- [0x0000004020 - 0x0000004023] size 0x00000004 gran 0x02 io
PCI: 00:11.0 18 <- [0x0000004018 - 0x000000401f] size 0x00000008 gran 0x03 io
PCI: 00:11.0 1c <- [0x0000004024 - 0x0000004027] size 0x00000004 gran 0x02 io
PCI: 00:11.0 20 <- [0x0000004000 - 0x000000400f] size 0x00000010 gran 0x04 io
PCI: 00:11.0 24 <- [0x00f7f03000 - 0x00f7f033ff] size 0x00000400 gran 0x0a mem
PCI: 00:12.0 10 <- [0x00f7f00000 - 0x00f7f00fff] size 0x00001000 gran 0x0c mem
PCI: 00:12.2 10 <- [0x00f7f04000 - 0x00f7f040ff] size 0x00000100 gran 0x08 mem
PCI: 00:13.0 10 <- [0x00f7f01000 - 0x00f7f01fff] size 0x00001000 gran 0x0c mem
PCI: 00:13.2 10 <- [0x00f7f05000 - 0x00f7f050ff] size 0x00000100 gran 0x08 mem
SB800 - Lpc.c - lpc_set_resources - Start.
PCI: 00:14.3 assign_resources, bus 0 link: 0
PNP: 002e.2 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
PNP: 002e.2 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
PNP: 002e.3 60 <- [0x00000002f8 - 0x00000002ff] size 0x00000008 gran 0x03 io
PNP: 002e.3 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq
PCI: 00:14.3 assign_resources, bus 0 link: 0
SB800 - Lpc.c - lpc_set_resources - End.
PCI: 00:14.4 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 05 io
PCI: 00:14.4 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 05 prefmem
PCI: 00:14.4 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 05 mem
PCI: 00:15.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 06 io
PCI: 00:15.0 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 06 prefmem
PCI: 00:15.0 20 <- [0x00f7e00000 - 0x00f7efffff] size 0x00100000 gran 0x14 bus 06 mem
PCI: 00:15.0 assign_resources, bus 6 link: 0
PCI: 06:00.0 10 <- [0x00f7e00000 - 0x00f7e0ffff] size 0x00010000 gran 0x10 mem64
PCI: 00:15.0 assign_resources, bus 6 link: 0
PCI: 00:16.0 10 <- [0x00f7f02000 - 0x00f7f02fff] size 0x00001000 gran 0x0c mem
PCI: 00:16.2 10 <- [0x00f7f06000 - 0x00f7f060ff] size 0x00000100 gran 0x08 mem
DOMAIN: 0000 assign_resources, bus 0 link: 0
adsr - leaving this lovely routine.
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
Root Device child on link 0 CPU_CLUSTER: 0
CPU_CLUSTER: 0 child on link 0 APIC: 00
APIC: 00
APIC: 01
DOMAIN: 0000 child on link 0 PCI: 00:00.0
DOMAIN: 0000 resource base 1000 size 3028 align 12 gran 0 limit ffff flags 40040100 index 10000000
DOMAIN: 0000 resource base f7700000 size 806100 align 20 gran 0 limit f7ffffff flags 40040200 index 10000100
DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 10
DOMAIN: 0000 resource base c0000 size dff40000 align 0 gran 0 limit 0 flags e0004200 index 20
DOMAIN: 0000 resource base 100000000 size 1efffc00 align 0 gran 0 limit 0 flags e0004200 index 30
PCI: 00:00.0
PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
PCI: 00:01.0
PCI: 00:04.0 child on link 0 PCI: 01:00.0
PCI: 00:04.0 resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 60080102 index 1c
PCI: 00:04.0 resource base f7700000 size 100000 align 20 gran 20 limit f77fffff flags 60081202 index 24
PCI: 00:04.0 resource base f7800000 size 100000 align 20 gran 20 limit f78fffff flags 60080202 index 20
PCI: 01:00.0
PCI: 01:00.0 resource base 1000 size 100 align 8 gran 8 limit 10ff flags 60000100 index 10
PCI: 01:00.0 resource base f7800000 size 1000 align 12 gran 12 limit f7800fff flags 60000201 index 18
PCI: 01:00.0 resource base f7700000 size 4000 align 14 gran 14 limit f7703fff flags 60001201 index 20
PCI: 00:05.0 child on link 0 PCI: 02:00.0
PCI: 00:05.0 resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 60080102 index 1c
PCI: 00:05.0 resource base f7900000 size 100000 align 20 gran 20 limit f79fffff flags 60081202 index 24
PCI: 00:05.0 resource base f7a00000 size 100000 align 20 gran 20 limit f7afffff flags 60080202 index 20
PCI: 02:00.0
PCI: 02:00.0 resource base 2000 size 100 align 8 gran 8 limit 20ff flags 60000100 index 10
PCI: 02:00.0 resource base f7a00000 size 1000 align 12 gran 12 limit f7a00fff flags 60000201 index 18
PCI: 02:00.0 resource base f7900000 size 4000 align 14 gran 14 limit f7903fff flags 60001201 index 20
PCI: 00:06.0 child on link 0 PCI: 03:00.0
PCI: 00:06.0 resource base 3000 size 1000 align 12 gran 12 limit 3fff flags 60080102 index 1c
PCI: 00:06.0 resource base f7b00000 size 100000 align 20 gran 20 limit f7bfffff flags 60081202 index 24
PCI: 00:06.0 resource base f7c00000 size 100000 align 20 gran 20 limit f7cfffff flags 60080202 index 20
PCI: 03:00.0
PCI: 03:00.0 resource base 3000 size 100 align 8 gran 8 limit 30ff flags 60000100 index 10
PCI: 03:00.0 resource base f7c00000 size 1000 align 12 gran 12 limit f7c00fff flags 60000201 index 18
PCI: 03:00.0 resource base f7b00000 size 4000 align 14 gran 14 limit f7b03fff flags 60001201 index 20
PCI: 00:07.0 child on link 0 PCI: 04:00.0
PCI: 00:07.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
PCI: 00:07.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24
PCI: 00:07.0 resource base f7d00000 size 100000 align 20 gran 20 limit f7dfffff flags 60080202 index 20
PCI: 04:00.0
PCI: 04:00.0 resource base f7d00000 size 10000 align 16 gran 16 limit f7d0ffff flags 60000201 index 10
PCI: 00:08.0
PCI: 00:11.0
PCI: 00:11.0 resource base 4010 size 8 align 3 gran 3 limit 4017 flags 60000100 index 10
PCI: 00:11.0 resource base 4020 size 4 align 2 gran 2 limit 4023 flags 60000100 index 14
PCI: 00:11.0 resource base 4018 size 8 align 3 gran 3 limit 401f flags 60000100 index 18
PCI: 00:11.0 resource base 4024 size 4 align 2 gran 2 limit 4027 flags 60000100 index 1c
PCI: 00:11.0 resource base 4000 size 10 align 4 gran 4 limit 400f flags 60000100 index 20
PCI: 00:11.0 resource base f7f03000 size 400 align 12 gran 10 limit f7f033ff flags 60000200 index 24
PCI: 00:12.0
PCI: 00:12.0 resource base f7f00000 size 1000 align 12 gran 12 limit f7f00fff flags 60000200 index 10
PCI: 00:12.2
PCI: 00:12.2 resource base f7f04000 size 100 align 12 gran 8 limit f7f040ff flags 60000200 index 10
PCI: 00:13.0
PCI: 00:13.0 resource base f7f01000 size 1000 align 12 gran 12 limit f7f01fff flags 60000200 index 10
PCI: 00:13.2
PCI: 00:13.2 resource base f7f05000 size 100 align 12 gran 8 limit f7f050ff flags 60000200 index 10
PCI: 00:14.0
PCI: 00:14.1
PCI: 00:14.2
PCI: 00:14.3 child on link 0 PNP: 002e.0
PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
PCI: 00:14.3 resource base fec10000 size 400 align 0 gran 0 limit 0 flags e0040200 index 2
PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
PNP: 002e.0
PNP: 002e.0 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60
PNP: 002e.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 002e.2
PNP: 002e.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
PNP: 002e.2 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PNP: 002e.3
PNP: 002e.3 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
PNP: 002e.3 resource base 3 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PNP: 002e.10
PNP: 002e.10 resource base 3e8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
PNP: 002e.10 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 002e.11
PNP: 002e.11 resource base 2e8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
PNP: 002e.11 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 002e.8
PNP: 002e.f
PNP: 002e.7
PNP: 002e.107
PNP: 002e.607
PNP: 002e.e
PNP: 002e.14
PCI: 00:14.4
PCI: 00:14.4 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
PCI: 00:14.4 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24
PCI: 00:14.4 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60080202 index 20
PCI: 00:14.5
PCI: 00:15.0 child on link 0 PCI: 06:00.0
PCI: 00:15.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
PCI: 00:15.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24
PCI: 00:15.0 resource base f7e00000 size 100000 align 20 gran 20 limit f7efffff flags 60080202 index 20
PCI: 06:00.0
PCI: 06:00.0 resource base f7e00000 size 10000 align 16 gran 16 limit f7e0ffff flags 60000201 index 10
PCI: 00:15.1
PCI: 00:15.2
PCI: 00:15.3
PCI: 00:16.0
PCI: 00:16.0 resource base f7f02000 size 1000 align 12 gran 12 limit f7f02fff flags 60000200 index 10
PCI: 00:16.2
PCI: 00:16.2 resource base f7f06000 size 100 align 12 gran 8 limit f7f060ff flags 60000200 index 10
PCI: 00:18.0
PCI: 00:18.1
PCI: 00:18.2
PCI: 00:18.3
PCI: 00:18.4
PCI: 00:18.5
PCI: 00:18.6
PCI: 00:18.7
Done allocating resources.
BS: BS_DEV_RESOURCES times (us): entry 0 run 2608710 exit 0
APIC 00: ** Enter AmdInitMid [00020005]
SB800: sb_After_Pci_Init
SB800: sb_Mid_Post_Init
AmdInitMid() returned AGESA_SUCCESS
APIC 00: Heap in SystemMem (4) at 0x10000014
APIC 00: ** Exit AmdInitMid [00020005]
PCI_INTR tables: Writing registers C00/C01 for PIC mode PCI IRQ routing:
PCI_INTR_INDEX PCI_INTR_DATA
0x00 INTA# : 0x0A
0x01 INTB# : 0x0B
0x02 INTC# : 0x0A
0x03 INTD# : 0x0B
0x04 INTE# : 0x0A
0x05 INTF# : 0x0B
0x06 INTG# : 0x0A
0x07 INTH# : 0x0B
0x08 Misc : 0x00
0x09 Misc0 : 0xF1
0x0A Misc1 : 0x00
0x0B Misc2 : 0x00
0x0C Ser IRQ INTA : 0x1F
0x0D Ser IRQ INTB : 0x1F
0x0E Ser IRQ INTC : 0x1F
0x0F Ser IRQ INTD : 0x1F
0x10 SCI : 0x1F
0x11 SMBUS0 : 0x1F
0x12 ASF : 0x1F
0x13 HDA : 0x0A
0x14 FC : 0x1F
0x15 GEC : 0x1F
0x16 PerMon : 0x1F
0x20 IMC INT0 : 0x1F
0x21 IMC INT1 : 0x1F
0x22 IMC INT2 : 0x1F
0x23 IMC INT3 : 0x1F
0x24 IMC INT4 : 0x1F
0x25 IMC INT5 : 0x1F
0x30 Dev18.0 INTA : 0x0A
0x31 Dev18.2 INTB : 0x0B
0x32 Dev19.0 INTA : 0x0A
0x33 Dev19.2 INTB : 0x0B
0x34 Dev22.0 INTA : 0x0A
0x35 Dev22.2 INTB : 0x0B
0x36 Dev20.5 INTC : 0x0A
0x40 IDE : 0x0B
0x41 SATA : 0x0B
0x50 GPPInt0 : 0x0A
0x51 GPPInt1 : 0x0B
0x52 GPPInt2 : 0x0A
0x53 GPPInt3 : 0x0B
PCI_INTR tables: Writing registers C00/C01 for APIC mode PCI IRQ routing:
PCI_INTR_INDEX PCI_INTR_DATA
0x00 INTA# : 0x10
0x01 INTB# : 0x11
0x02 INTC# : 0x12
0x03 INTD# : 0x13
0x04 INTE# : 0x14
0x05 INTF# : 0x15
0x06 INTG# : 0x16
0x07 INTH# : 0x17
0x08 Misc : 0x00
0x09 Misc0 : 0x00
0x0A Misc1 : 0x00
0x0B Misc2 : 0x00
0x0C Ser IRQ INTA : 0x1F
0x0D Ser IRQ INTB : 0x1F
0x0E Ser IRQ INTC : 0x1F
0x0F Ser IRQ INTD : 0x1F
0x10 SCI : 0x09
0x11 SMBUS0 : 0x1F
0x12 ASF : 0x1F
0x13 HDA : 0x10
0x14 FC : 0x1F
0x15 GEC : 0x12
0x16 PerMon : 0x1F
0x20 IMC INT0 : 0x1F
0x21 IMC INT1 : 0x1F
0x22 IMC INT2 : 0x1F
0x23 IMC INT3 : 0x1F
0x24 IMC INT4 : 0x1F
0x25 IMC INT5 : 0x1F
0x30 Dev18.0 INTA : 0x12
0x31 Dev18.2 INTB : 0x11
0x32 Dev19.0 INTA : 0x12
0x33 Dev19.2 INTB : 0x11
0x34 Dev22.0 INTA : 0x12
0x35 Dev22.2 INTB : 0x11
0x36 Dev20.5 INTC : 0x12
0x40 IDE : 0x11
0x41 SATA : 0x13
0x50 GPPInt0 : 0x10
0x51 GPPInt1 : 0x11
0x52 GPPInt2 : 0x12
0x53 GPPInt3 : 0x13
PCI_CFG IRQ: Write PCI config space IRQ assignments
PCI IRQ: Found device 0:04.00 using PIN A
Found this device in pirq_data table entry 1
Orig INT_PIN : 1 (PIN A)
PCI_INTR idx : 0x00 (INTA# )
INT_LINE : 0xA (IRQ 10)
PCI IRQ: Found device 0:05.00 using PIN A
Found this device in pirq_data table entry 2
Orig INT_PIN : 1 (PIN A)
PCI_INTR idx : 0x00 (INTA# )
INT_LINE : 0xA (IRQ 10)
PCI IRQ: Found device 0:06.00 using PIN A
Found this device in pirq_data table entry 3
Orig INT_PIN : 1 (PIN A)
PCI_INTR idx : 0x00 (INTA# )
INT_LINE : 0xA (IRQ 10)
PCI IRQ: Found device 0:07.00 using PIN A
Found this device in pirq_data table entry 4
Orig INT_PIN : 1 (PIN A)
PCI_INTR idx : 0x00 (INTA# )
INT_LINE : 0xA (IRQ 10)
PCI IRQ: Found device 0:11.00 using PIN A
Found this device in pirq_data table entry 5
Orig INT_PIN : 1 (PIN A)
PCI_INTR idx : 0x41 (SATA )
INT_LINE : 0xB (IRQ 11)
PCI IRQ: Found device 0:12.00 using PIN A
Found this device in pirq_data table entry 6
Orig INT_PIN : 1 (PIN A)
PCI_INTR idx : 0x30 (Dev18.0 INTA)
INT_LINE : 0xA (IRQ 10)
PCI IRQ: Found device 0:12.02 using PIN B
Found this device in pirq_data table entry 7
Orig INT_PIN : 2 (PIN B)
PCI_INTR idx : 0x31 (Dev18.2 INTB)
INT_LINE : 0xB (IRQ 11)
PCI IRQ: Found device 0:13.00 using PIN A
Found this device in pirq_data table entry 8
Orig INT_PIN : 1 (PIN A)
PCI_INTR idx : 0x32 (Dev19.0 INTA)
INT_LINE : 0xA (IRQ 10)
PCI IRQ: Found device 0:13.02 using PIN B
Found this device in pirq_data table entry 9
Orig INT_PIN : 2 (PIN B)
PCI_INTR idx : 0x33 (Dev19.2 INTB)
INT_LINE : 0xB (IRQ 11)
PCI IRQ: Found device 0:16.00 using PIN A
Found this device in pirq_data table entry 16
Orig INT_PIN : 1 (PIN A)
PCI_INTR idx : 0x34 (Dev22.0 INTA)
INT_LINE : 0xA (IRQ 10)
PCI IRQ: Found device 0:16.02 using PIN B
Found this device in pirq_data table entry 17
Orig INT_PIN : 2 (PIN B)
PCI_INTR idx : 0x35 (Dev22.2 INTB)
INT_LINE : 0xB (IRQ 11)
PCI IRQ: Found device 1:00.00 using PIN A
With INT_PIN swizzled to PIN A
Attached to bridge device 0:04h.00h
Found this device in pirq_data table entry 1
Orig INT_PIN : 1 (PIN A)
PCI_INTR idx : 0x00 (INTA# )
INT_LINE : 0xA (IRQ 10)
PCI IRQ: Found device 2:00.00 using PIN A
With INT_PIN swizzled to PIN A
Attached to bridge device 0:05h.00h
Found this device in pirq_data table entry 2
Orig INT_PIN : 1 (PIN A)
PCI_INTR idx : 0x00 (INTA# )
INT_LINE : 0xA (IRQ 10)
PCI IRQ: Found device 3:00.00 using PIN A
With INT_PIN swizzled to PIN A
Attached to bridge device 0:06h.00h
Found this device in pirq_data table entry 3
Orig INT_PIN : 1 (PIN A)
PCI_INTR idx : 0x00 (INTA# )
INT_LINE : 0xA (IRQ 10)
PCI IRQ: Found device 4:00.00 using PIN A
With INT_PIN swizzled to PIN A
Attached to bridge device 0:07h.00h
Found this device in pirq_data table entry 4
Orig INT_PIN : 1 (PIN A)
PCI_INTR idx : 0x00 (INTA# )
INT_LINE : 0xA (IRQ 10)
PCI IRQ: Found device 6:00.00 using PIN A
With INT_PIN swizzled to PIN A
Attached to bridge device 0:15h.00h
Found this device in pirq_data table entry 15
Orig INT_PIN : 1 (PIN A)
PCI_INTR idx : 0x00 (INTA# )
INT_LINE : 0xA (IRQ 10)
PCI_CFG IRQ: Finished writing PCI config space IRQ assignments
Timestamp - device enable: 5476928123
Enabling resources...
PCI: 00:00.0 cmd <- 06
PCI: 00:04.0 bridge ctrl <- 0003
PCI: 00:04.0 cmd <- 07
PCI: 00:05.0 bridge ctrl <- 0003
PCI: 00:05.0 cmd <- 07
PCI: 00:06.0 bridge ctrl <- 0003
PCI: 00:06.0 cmd <- 07
PCI: 00:07.0 bridge ctrl <- 0003
PCI: 00:07.0 cmd <- 06
PCI: 00:11.0 subsystem <- 1022/1510
PCI: 00:11.0 cmd <- 03
PCI: 00:12.0 subsystem <- 1022/1510
PCI: 00:12.0 cmd <- 02
PCI: 00:12.2 subsystem <- 1022/1510
PCI: 00:12.2 cmd <- 02
PCI: 00:13.0 subsystem <- 1022/1510
PCI: 00:13.0 cmd <- 02
PCI: 00:13.2 subsystem <- 1022/1510
PCI: 00:13.2 cmd <- 02
PCI: 00:14.0 subsystem <- 1022/1510
PCI: 00:14.0 cmd <- 403
PCI: 00:14.3 subsystem <- 1022/1510
PCI: 00:14.3 cmd <- 0f
PCI: 00:14.4 bridge ctrl <- 0003
PCI: 00:14.4 cmd <- 21
PCI: 00:15.0 bridge ctrl <- 0003
PCI: 00:15.0 cmd <- 06
PCI: 00:16.0 subsystem <- 1022/1510
PCI: 00:16.0 cmd <- 02
PCI: 00:16.2 subsystem <- 1022/1510
PCI: 00:16.2 cmd <- 02
PCI: 00:18.0 subsystem <- 1022/1510
PCI: 00:18.0 cmd <- 00
PCI: 00:18.1 subsystem <- 1022/1510
PCI: 00:18.1 cmd <- 00
PCI: 00:18.2 subsystem <- 1022/1510
PCI: 00:18.2 cmd <- 00
PCI: 00:18.3 subsystem <- 1022/1510
PCI: 00:18.3 cmd <- 00
PCI: 00:18.4 subsystem <- 1022/1510
PCI: 00:18.4 cmd <- 00
PCI: 00:18.5 subsystem <- 1022/1510
PCI: 00:18.5 cmd <- 00
PCI: 00:18.6 subsystem <- 1022/1510
PCI: 00:18.6 cmd <- 00
PCI: 00:18.7 subsystem <- 1022/1510
PCI: 00:18.7 cmd <- 00
PCI: 01:00.0 cmd <- 03
PCI: 02:00.0 cmd <- 03
PCI: 03:00.0 cmd <- 03
PCI: 04:00.0 cmd <- 02
PCI: 06:00.0 cmd <- 02
done.
BS: BS_DEV_ENABLE times (us): entry 500473 run 139852 exit 0
Timestamp - device initialization: 5622171507
Initializing devices...
Root Device init ...
Root Device init finished in 1927 usecs
CPU_CLUSTER: 0 init ...
start_eip=0x00001000, code_size=0x00000031
Initializing CPU #0
CPU: vendor AMD device 500f20
CPU: family 14, model 02, stepping 00
Model 14 Init.
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Enabling cache
Setting up local APIC... apic_id: 0x00 done.
siblings = 01, CPU #0 initialized
CPU1: stack_base dfee8000, stack_end dfee8ff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 1.
After apic_write.
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 1.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #1
Waiting for 1 CPUS to stop
CPU: vendor AMD device 500f20
CPU: family 14, model 02, stepping 00
Model 14 Init.
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
Enabling cache
Setting up local APIC... apic_id: 0x01 done.
siblings = 01, CPU #1 initialized
All AP CPUs stopped (2172 loops)
CPU0: stack: dfee9000 - dfeea000, lowest used address dfee991c, stack used: 1764 bytes
CPU1: stack: dfee8000 - dfee9000, lowest used address dfee8ddc, stack used: 548 bytes
CPU_CLUSTER: 0 init finished in 118984 usecs
DOMAIN: 0000 init ...
DOMAIN: 0000 init finished in 2009 usecs
PCI: 00:00.0 init ...
Northbridge init
PCI: 00:00.0 init finished in 3586 usecs
PCI: 00:11.0 init ...
PCI: 00:11.0 init finished in 2009 usecs
PCI: 00:14.0 init ...
PCI: 00:14.0 init finished in 2010 usecs
PCI: 00:14.3 init ...
SB800 - Late.c - lpc_init - Start.
RTC Init
SB800 - Late.c - lpc_init - End.
PCI: 00:14.3 init finished in 9204 usecs
PCI: 00:18.0 init ...
PCI: 00:18.0 init finished in 2010 usecs
PCI: 00:18.1 init ...
PCI: 00:18.1 init finished in 2011 usecs
PCI: 00:18.2 init ...
PCI: 00:18.2 init finished in 2010 usecs
PCI: 00:18.3 init ...
PCI: 00:18.3 init finished in 2010 usecs
PCI: 00:18.4 init ...
PCI: 00:18.4 init finished in 2010 usecs
PCI: 00:18.5 init ...
PCI: 00:18.5 init finished in 2010 usecs
PCI: 00:18.6 init ...
PCI: 00:18.6 init finished in 2010 usecs
PCI: 00:18.7 init ...
PCI: 00:18.7 init finished in 2009 usecs
PCI: 01:00.0 init ...
PCI: 01:00.0 init finished in 2010 usecs
PCI: 02:00.0 init ...
PCI: 02:00.0 init finished in 2010 usecs
PCI: 03:00.0 init ...
PCI: 03:00.0 init finished in 2010 usecs
PCI: 04:00.0 init ...
PCI: 04:00.0 init finished in 2010 usecs
PNP: 002e.2 init ...
PNP: 002e.2 init finished in 1949 usecs
PNP: 002e.3 init ...
PNP: 002e.3 init finished in 1949 usecs
PNP: 002e.14 init ...
PNP: 002e.14 init finished in 2014 usecs
PCI: 06:00.0 init ...
PCI: 06:00.0 init finished in 2009 usecs
Devices initialized
Show all devs... After init.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 0
PCI: 00:04.0: enabled 1
PCI: 00:05.0: enabled 1
PCI: 00:06.0: enabled 1
PCI: 00:07.0: enabled 1
PCI: 00:08.0: enabled 0
PCI: 00:11.0: enabled 1
PCI: 00:12.0: enabled 1
PCI: 00:12.2: enabled 1
PCI: 00:13.0: enabled 1
PCI: 00:13.2: enabled 1
PCI: 00:14.0: enabled 1
PCI: 00:14.1: enabled 0
PCI: 00:14.2: enabled 0
PCI: 00:14.3: enabled 1
PNP: 002e.0: enabled 0
PNP: 002e.2: enabled 1
PNP: 002e.3: enabled 1
PNP: 002e.10: enabled 0
PNP: 002e.11: enabled 0
PNP: 002e.8: enabled 0
PNP: 002e.f: enabled 0
PNP: 002e.7: enabled 0
PNP: 002e.107: enabled 0
PNP: 002e.607: enabled 0
PNP: 002e.e: enabled 0
PCI: 00:14.4: enabled 1
PCI: 00:14.5: enabled 0
PCI: 00:15.0: enabled 1
PCI: 00:15.1: enabled 0
PCI: 00:15.2: enabled 0
PCI: 00:15.3: enabled 0
PCI: 00:16.0: enabled 1
PCI: 00:16.2: enabled 1
PCI: 00:18.0: enabled 1
PCI: 00:18.1: enabled 1
PCI: 00:18.2: enabled 1
PCI: 00:18.3: enabled 1
PCI: 00:18.4: enabled 1
PCI: 00:18.5: enabled 1
PCI: 00:18.6: enabled 1
PCI: 00:18.7: enabled 1
APIC: 01: enabled 1
PCI: 01:00.0: enabled 1
PCI: 02:00.0: enabled 1
PCI: 03:00.0: enabled 1
PCI: 04:00.0: enabled 1
PNP: 002e.14: enabled 1
PCI: 06:00.0: enabled 1
BS: BS_DEV_INIT times (us): entry 0 run 384568 exit 0
Finalize devices...
Devices finalized
Timestamp - device setup done: 6015047695
APIC 00: ** Enter AmdInitLate [00020004]
SB800: sb_Late_Post
AmdInitLate() returned AGESA_SUCCESS
APIC 00: Heap in SystemMem (4) at 0x10000014
APIC 00: ** Exit AmdInitLate [00020004]
APIC 00: ** Enter AmdS3Save [0002000b]
Manufacturer: c2
SF: Detected MX25L1605D with sector size 0x1000, total 0x200000
SF: Successfully erased 4096 bytes @ 0xffff1000
Manufacturer: c2
SF: Detected MX25L1605D with sector size 0x1000, total 0x200000
SF: Successfully erased 4096 bytes @ 0xffff0000
AmdS3Save() returned AGESA_SUCCESS
APIC 00: Heap in SystemMem (4) at 0x10000014
APIC 00: ** Exit AmdS3Save [0002000b]
BS: BS_POST_DEVICE times (us): entry 0 run 7246 exit 140568
Timestamp - cbmem post: 6166187498
BS: BS_OS_RESUME_CHECK times (us): entry 0 run 3136 exit 0
Timestamp - write tables: 6174541035
Writing IRQ routing tables to 0xf0000...write_pirq_routing_table done.
Writing IRQ routing tables to 0xdfd70000...write_pirq_routing_table done.
PIRQ table: 48 bytes.
Wrote the mp table end at: 000f0410 - 000f05d4
Wrote the mp table end at: dfd6f010 - dfd6f1d4
MP table: 468 bytes.
CBFS: 'Master Header Locator' located CBFS at [200:1fffc0)
CBFS: Locating 'fallback/dsdt.aml'
CBFS: Found @ offset 4fc40 size 26a8
CBFS: 'Master Header Locator' located CBFS at [200:1fffc0)
CBFS: Locating 'fallback/slic'
CBFS: 'fallback/slic' not found.
ACPI: Writing ACPI tables at dfd4b000.
ACPI: * FACS
ACPI: * DSDT
ACPI: * FADT
ACPI_BLK_BASE: 0x0800
ACPI: added table 1/32, length now 40
ACPI: * SSDT
ACPI: added table 2/32, length now 44
ACPI: * MCFG
ACPI: * TCPA
TCPA log created at dfd3b000
ACPI: added table 3/32, length now 48
ACPI: * MADT
ACPI: added table 4/32, length now 52
current = dfd4db60
ACPI: added table 5/32, length now 56
ACPI: * SRAT at dfd4dcf8
AGESA SRAT table NULL. Skipping.
ACPI: * SLIT at dfd4dcf8
AGESA SLIT table NULL. Skipping.
ACPI: * AGESA ALIB SSDT at dfd4dd00
ACPI: added table 6/32, length now 60
ACPI: * AGESA SSDT Pstate at dfd4f390
ACPI: added table 7/32, length now 64
ACPI: * HPET
ACPI: added table 8/32, length now 68
ACPI: done.
ACPI tables: 18144 bytes.
smbios_write_tables: dfd3a000
Root Device (PC Engines APU1)
CPU_CLUSTER: 0 (AMD Family 14h Root Complex)
APIC: 00 (AMD CPU Family 14h Model 00h-0Fh)
DOMAIN: 0000 (AMD Family 14h Root Complex)
PCI: 00:00.0 (AMD Family 14h Northbridge)
PCI: 00:01.0 (AMD Family 14h Northbridge)
PCI: 00:04.0 (AMD Family 14h Northbridge)
PCI: 00:05.0 (AMD Family 14h Northbridge)
PCI: 00:06.0 (AMD Family 14h Northbridge)
PCI: 00:07.0 (AMD Family 14h Northbridge)
PCI: 00:08.0 (AMD Family 14h Northbridge)
PCI: 00:11.0 (ATI SB800)
PCI: 00:12.0 (ATI SB800)
PCI: 00:12.2 (ATI SB800)
PCI: 00:13.0 (ATI SB800)
PCI: 00:13.2 (ATI SB800)
PCI: 00:14.0 (ATI SB800)
PCI: 00:14.1 (ATI SB800)
PCI: 00:14.2 (ATI SB800)
PCI: 00:14.3 (ATI SB800)
PNP: 002e.0 (Nuvoton NCT5104D Super I/O)
PNP: 002e.2 (Nuvoton NCT5104D Super I/O)
PNP: 002e.3 (Nuvoton NCT5104D Super I/O)
PNP: 002e.10 (Nuvoton NCT5104D Super I/O)
PNP: 002e.11 (Nuvoton NCT5104D Super I/O)
PNP: 002e.8 (Nuvoton NCT5104D Super I/O)
PNP: 002e.f (Nuvoton NCT5104D Super I/O)
PNP: 002e.7 (Nuvoton NCT5104D Super I/O)
PNP: 002e.107 (Nuvoton NCT5104D Super I/O)
PNP: 002e.607 (Nuvoton NCT5104D Super I/O)
PNP: 002e.e (Nuvoton NCT5104D Super I/O)
PCI: 00:14.4 (ATI SB800)
PCI: 00:14.5 (ATI SB800)
PCI: 00:15.0 (ATI SB800)
PCI: 00:15.1 (ATI SB800)
PCI: 00:15.2 (ATI SB800)
PCI: 00:15.3 (ATI SB800)
PCI: 00:16.0 (ATI SB800)
PCI: 00:16.2 (ATI SB800)
PCI: 00:18.0 (AMD Family 14h Northbridge)
PCI: 00:18.1 (AMD Family 14h Northbridge)
PCI: 00:18.2 (AMD Family 14h Northbridge)
PCI: 00:18.3 (AMD Family 14h Northbridge)
PCI: 00:18.4 (AMD Family 14h Northbridge)
PCI: 00:18.5 (AMD Family 14h Northbridge)
PCI: 00:18.6 (AMD Family 14h Northbridge)
PCI: 00:18.7 (AMD Family 14h Northbridge)
APIC: 01 (unknown)
PCI: 01:00.0 (unknown)
PCI: 02:00.0 (unknown)
PCI: 03:00.0 (unknown)
PCI: 04:00.0 (unknown)
PNP: 002e.14 (unknown)
PCI: 06:00.0 (unknown)
SMBIOS tables: 331 bytes.
Writing table forward entry at 0x00000500
Wrote coreboot table at: 00000500, 0x10 bytes, checksum 1007
Writing coreboot table at 0xdfd71000
CBFS: 'Master Header Locator' located CBFS at [200:1fffc0)
CBFS: Locating 'cmos_layout.bin'
CBFS: Found @ offset 4a5c0 size 238
0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1. 0000000000001000-000000000009ffff: RAM
2. 00000000000c0000-00000000dfd39fff: RAM
3. 00000000dfd3a000-00000000dfffffff: CONFIGURATION TABLES
4. 00000000f8000000-00000000fbffffff: RESERVED
5. 0000000100000000-000000011effffff: RAM
Manufacturer: c2
SF: Detected MX25L1605D with sector size 0x1000, total 0x200000
CBFS: 'Master Header Locator' located CBFS at [200:1fffc0)
FMAP: Found "FLASH" version 1.1 at 0.
FMAP: base = ffe00000 size = 200000 #areas = 3
Wrote coreboot table at: dfd71000, 0x5a4 bytes, checksum 1d4f
coreboot table: 1468 bytes.
IMD ROOT 0. dffff000 00001000
IMD SMALL 1. dfffe000 00001000
CONSOLE 2. dffde000 00020000
TIME STAMP 3. dffdd000 00000400
ROMSTG STCK 4. dffc5000 00018000
AFTER CAR 5. dffba000 0000b000
57a9e102 6. dffb0000 000092f0
RAMSTAGE 7. dfeac000 00104000
57a9e100 8. dfda9000 001027f8
ACPISCRATCH 9. dfd79000 00030000
COREBOOT 10. dfd71000 00008000
IRQ TABLE 11. dfd70000 00001000
SMP TABLE 12. dfd6f000 00001000
ACPI 13. dfd4b000 00024000
TCPA LOG 14. dfd3b000 00010000
SMBIOS 15. dfd3a000 00000800
IMD small region:
IMD ROOT 0. dfffec00 00000400
ROMSTAGE 1. dfffebe0 00000004
57a9e002 2. dfffebc0 00000018
57a9e000 3. dfffeba0 00000018
COREBOOTFWD 4. dfffeb60 00000028
Timestamp - finalize chips: 6613611255
Mainboard APU1 Final.
BS: BS_WRITE_TABLES times (us): entry 0 run 444583 exit 0
Timestamp - load payload: 6624254695
CBFS: 'Master Header Locator' located CBFS at [200:1fffc0)
CBFS: Locating 'fallback/payload'
CBFS: Found @ offset 6e3c0 size 10f4d
Loading segment from ROM address 0xffe6e5f8
code (compression=1)
New segment dstaddr 0xdf840 memsize 0x207c0 srcaddr 0xffe6e630 filesize 0x10f15
Loading segment from ROM address 0xffe6e614
Entry Point 0x000fcfd9
Loading Segment: addr: 0x00000000000df840 memsz: 0x00000000000207c0 filesz: 0x0000000000010f15
lb: [0x00000000dfead000, 0x00000000dffaf7f8)
Post relocation: addr: 0x00000000000df840 memsz: 0x00000000000207c0 filesz: 0x0000000000010f15
using LZMA
Timestamp - starting LZMA decompress (ignore for x86): 6680553111
Timestamp - finished LZMA decompress (ignore for x86): 6727707877
[ 0x000df840, 00100000, 0x00100000) <- ffe6e630
dest 000df840, end 00100000, bouncebuffer ffffffff
Loaded segments
BS: BS_PAYLOAD_LOAD times (us): entry 0 run 119557 exit 0
Jumping to boot code at 000fcfd9(dfd71000)
Timestamp - selfboot jump: 6752781166
CPU0: stack: dfee9000 - dfeea000, lowest used address dfee991c, stack used: 1764 bytes
SeaBIOS (version rel-1.11.1-0-g0551a4b)
BUILD: gcc: (coreboot toolchain v1.50 October 15th, 2017) 6.3.0 binutils: (GNU Binutils) 2.29.1
Found coreboot cbmem console @ dffde000
Found mainboard PC Engines APU1
Relocating init from 0x000e0ec0 to 0xdfced160 (size 52736)
Found CBFS header at 0xffe00238
multiboot: eax=dfee53e0, ebx=dfee5394
Found 29 PCI devices (max PCI bus is 06)
Copying SMBIOS entry point from 0xdfd3a000 to 0x000f5b60
Copying ACPI RSDP from 0xdfd4b000 to 0x000f5b30
Copying MPTABLE from 0xdfd6f000/dfd6f010 to 0x000f5950
Copying PIR from 0xdfd70000 to 0x000f5920
Using pmtimer, ioport 0x808
Scan for VGA option rom
Turning on vga text mode console
SeaBIOS (version rel-1.11.1-0-g0551a4b)
EHCI init on dev 00:12.2 (regs=0xf7f04020)
/dfcea000\ Start thread
EHCI init on dev 00:13.2 (regs=0xf7f05020)
/dfce9000\ Start thread
EHCI init on dev 00:16.2 (regs=0xf7f06020)
/dfce8000\ Start thread
OHCI init on dev 00:12.0 (regs=0xf7f00000)
/dfce7000\ Start thread
OHCI init on dev 00:13.0 (regs=0xf7f01000)
/dfce6000\ Start thread
/dfce5000\ Start thread
OHCI init on dev 00:16.0 (regs=0xf7f02000)
/dfce4000\ Start thread
/dfce3000\ Start thread
/dfce1000\ Start thread
/dfce0000\ Start thread
/dfcdf000\ Start thread
|dfcdf000| WARNING - Timeout at i8042_flush:71!
\dfcdf000/ End thread
/dfcdf000\ Start thread
/dfcde000\ Start thread
/dfcdd000\ Start thread
AHCI controller at 00:11.0, iobase 0xf7f03000, irq 11
AHCI: cap 0xf332ff05, ports_impl 0x3f
/dfcdc000\ Start thread
|dfcdc000| AHCI/0: probing
|dfcdc000| AHCI/0: link up
/dfcdb000\ Start thread
/dfcda000\ Start thread
/dfcd9000\ Start thread
/dfcd7000\ Start thread
|dfcd7000| AHCI/1: probing
|dfcdc000| AHCI/0: ... finished, status 0x51, ERROR 0x4
/dfcd6000\ Start thread
/dfcd5000\ Start thread
/dfcd4000\ Start thread
/dfcd3000\ Start thread
/dfcd2000\ Start thread
|dfcd2000| AHCI/2: probing
|dfcd7000| AHCI/1: link down
|dfcdc000| Searching bootorder for: /pci@i0cf8/*@11/drive@0/disk@0
|dfcdc000| AHCI/0: supported modes: udma 6, multi-dma 2, pio 4
|dfcdc000| AHCI/0: Set transfer mode to UDMA-6
/dfcd1000\ Start thread
/dfcd0000\ Start thread
/dfccf000\ Start thread
/dfcce000\ Start thread
\dfcd3000/ End thread
\dfcd9000/ End thread
\dfcdd000/ End thread
\dfce0000/ End thread
\dfce5000/ End thread
/dfce0000\ Start thread
|dfce0000| AHCI/3: probing
|dfcd2000| AHCI/2: link down
\dfcd7000/ End thread
/dfcdd000\ Start thread
/dfcd9000\ Start thread
/dfcd7000\ Start thread
\dfcd5000/ End thread
\dfcdb000/ End thread
\dfcdf000/ End thread
\dfcce000/ End thread
\dfcd4000/ End thread
\dfcda000/ End thread
\dfcde000/ End thread
\dfce1000/ End thread
/dfce1000\ Start thread
|dfce1000| AHCI/4: probing
|dfce0000| AHCI/3: link down
\dfcd2000/ End thread
|dfcdc000| AHCI/0: registering: "AHCI/0: SATA SSD ATA-11 Hard-Disk (15272 MiBytes)"
\dfcdc000/ End thread
/dfcdf000\ Start thread
/dfcde000\ Start thread
/dfcdc000\ Start thread
\dfcdc000/ End thread
\dfcd7000/ End thread
\dfccf000/ End thread
\dfcd6000/ End thread
/dfcdc000\ Start thread
|dfcdc000| AHCI/5: probing
|dfce1000| AHCI/4: link down
\dfce0000/ End thread
/dfce0000\ Start thread
/dfcdb000\ Start thread
/dfcda000\ Start thread
\dfcda000/ End thread
\dfcea000/ End thread
Found 1 lpt ports
Found 2 serial ports
Searching bootorder for: /rom@img/memtest
Searching bootorder for: /rom@img/nvramcui
Searching bootorder for: /rom@img/coreinfo
|dfcdc000| AHCI/5: link down
\dfce1000/ End thread
\dfce0000/ End thread
\dfcdf000/ End thread
\dfcdd000/ End thread
\dfcd1000/ End thread
/dfce1000\ Start thread
\dfce1000/ End thread
\dfcdb000/ End thread
\dfcde000/ End thread
\dfcd9000/ End thread
\dfcd0000/ End thread
\dfce9000/ End thread
\dfcdc000/ End thread
\dfce7000/ End thread
\dfce4000/ End thread
\dfce6000/ End thread
|dfce3000| Searching bootorder for: /pci@i0cf8/usb@16,2/storage@1/*@0/*@0,0
|dfce3000| Searching bootorder for: /pci@i0cf8/usb@16,2/usb-*@1
|dfce3000| USB MSC vendor='Multiple' product='Card Reader' rev='1.00' type=0 removable=1
|dfce3000| Device reports MEDIUM NOT PRESENT
|dfce3000| scsi_is_ready returned -1
|dfce3000| Unable to configure USB MSC drive.
|dfce3000| Unable to configure USB MSC device.
\dfce3000/ End thread
\dfce8000/ End thread
All threads complete.
Scan for option roms
Press ESC for boot menu.
Searching bootorder for: HALT
drive 0x000f58b0: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=31277232
Space available for UMB: c0000-ec800, f5380-f58b0
Returned 253952 bytes of ZoneHigh
e820 map has 7 items:
0: 0000000000000000 - 000000000009fc00 = 1 RAM
1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
3: 0000000000100000 - 00000000dfd38000 = 1 RAM
4: 00000000dfd38000 - 00000000e0000000 = 2 RESERVED
5: 00000000f8000000 - 00000000fc000000 = 2 RESERVED
6: 0000000100000000 - 000000011f000000 = 1 RAM
enter handle_19:
NULL
Booting from Hard Disk...
Booting from 0000:7c00