blob: 96bc880403dfbb84bb6f9a30a6f23b136f509d79 [file] [log] [blame]
*** Pre-CBMEM romstage console overflowed, log truncated! ***
(log level: 8)...
SMBus controller enabled
Setting up static northbridge registers... done
Initializing Graphics...
Back from systemagent_early_init()
Intel ME early init
Intel ME firmware is ready
ME: Requested 0MB UMA
Starting native Platform init
DMI: Running at X4 @ 5000MT/s
FMAP: area RW_MRC_CACHE found @ 800000 (65536 bytes)
Trying stored timings.
Starting Ivy Bridge RAM training (fast boot).
100MHz reference clock support: yes
PLL_REF100_CFG value: 0x7
Trying CAS 11, tCK 320.
Trying CAS 10, tCK 365.
Trying CAS 9, tCK 384.
Found compatible clock, CAS pair.
Selected DRAM frequency: 666 MHz
Selected CAS latency : 9T
MPLL busy... done in 60 us
MPLL frequency is set at : 666 MHz
Done dimm mapping
Update PCI-E configuration space:
PCI(0, 0, 0)[a0] = 0
PCI(0, 0, 0)[a4] = 4
PCI(0, 0, 0)[bc] = 82a00000
PCI(0, 0, 0)[a8] = 7d600000
PCI(0, 0, 0)[ac] = 4
PCI(0, 0, 0)[b8] = 80000000
PCI(0, 0, 0)[b0] = 80a00000
PCI(0, 0, 0)[b4] = 80800000
Done memory map
Done io registers
t123: 1912, 6000, 7620
ME: Wrong mode : 2
ME: FWS2: 0x160a0140
ME: Bist in progress: 0x0
ME: ICC Status : 0x0
ME: Invoke MEBx : 0x0
ME: CPU replaced : 0x0
ME: MBP ready : 0x0
ME: MFS failure : 0x1
ME: Warm reset req : 0x0
ME: CPU repl valid : 0x1
ME: (Reserved) : 0x0
ME: FW update req : 0x0
ME: (Reserved) : 0x0
ME: Current state : 0xa
ME: Current PM event: 0x6
ME: Progress code : 0x1
PASSED! Tell ME that DRAM is ready
ME: ME is reporting as disabled, so not waiting for a response.
ME: FWS2: 0x160a0140
ME: Bist in progress: 0x0
ME: ICC Status : 0x0
ME: Invoke MEBx : 0x0
ME: CPU replaced : 0x0
ME: MBP ready : 0x0
ME: MFS failure : 0x1
ME: Warm reset req : 0x0
ME: CPU repl valid : 0x1
ME: (Reserved) : 0x0
ME: FW update req : 0x0
ME: (Reserved) : 0x0
ME: Current state : 0xa
ME: Current PM event: 0x6
ME: Progress code : 0x1
ME: Requested BIOS Action: No DID Ack received
ME: FW Partition Table : OK
ME: Bringup Loader Failure : NO
ME: Firmware Init Complete : NO
ME: Manufacturing Mode : YES
ME: Boot Options Present : NO
ME: Update In Progress : NO
ME: Current Working State : Initializing
ME: Current Operation State : Bring up
ME: Current Operation Mode : Debug or Disabled by AltDisableBit
ME: Error Code : No Error
ME: Progress Phase : BUP Phase
ME: Power Management Event : Pseudo-global reset
ME: Progress Phase State : Check to see if straps say ME DISABLED
memcfg DDR3 ref clock 133 MHz
memcfg DDR3 clock 1330 MHz
memcfg channel assignment: A: 0, B 1, C 2
memcfg channel[0] config (00620020):
ECC inactive
enhanced interleave mode on
rank interleave on
DIMMA 8192 MB width x8 dual rank, selected
DIMMB 0 MB width x8 single rank
memcfg channel[1] config (00620020):
ECC inactive
enhanced interleave mode on
rank interleave on
DIMMA 8192 MB width x8 dual rank, selected
DIMMB 0 MB width x8 single rank
CBMEM:
IMD: root @ 0x7ffff000 254 entries.
IMD: root @ 0x7fffec00 62 entries.
External stage cache:
IMD: root @ 0x803ff000 254 entries.
IMD: root @ 0x803fec00 62 entries.
CBMEM entry for DIMM info: 0x7fffe940
SMM Memory Map
SMRAM : 0x80000000 0x800000
Subregion 0: 0x80000000 0x300000
Subregion 1: 0x80300000 0x100000
Subregion 2: 0x80400000 0x400000
MTRR Range: Start=7f800000 End=80000000 (Size 800000)
MTRR Range: Start=80000000 End=80800000 (Size 800000)
MTRR Range: Start=ff000000 End=0 (Size 1000000)
Normal boot
CBFS: Found 'fallback/postcar' @0x47640 size 0x4ff8 in mcache @0xfeff109c
Loading module at 0x7ffd2000 with entry 0x7ffd2031. filesize: 0x4c90 memsize: 0x8fb8
Processing 202 relocs. Offset value of 0x7dfd2000
BS: romstage times (exec / console): total (unknown) / 1 ms
coreboot-4.13-3305-g8f3e1192df-dirty Tue Apr 20 09:19:20 UTC 2021 postcar starting (log level: 8)...
Normal boot
CBFS: Found 'fallback/ramstage' @0x19fc0 size 0x1df23 in mcache @0x7fffd0dc
Loading module at 0x7ff79000 with entry 0x7ff79000. filesize: 0x3d798 memsize: 0x575d0
Processing 4229 relocs. Offset value of 0x7f179000
BS: postcar times (exec / console): total (unknown) / 0 ms
coreboot-4.13-3305-g8f3e1192df-dirty Tue Apr 20 09:19:20 UTC 2021 ramstage starting (log level: 8)...
Normal boot
Enumerating buses...
Show all devs... Before device enumeration.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
DOMAIN: 0000: enabled 1
APIC: 00: enabled 1
APIC: acac: enabled 0
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 0
PCI: 00:02.0: enabled 1
PCI: 00:14.0: enabled 1
PCI: 00:16.0: enabled 1
PCI: 00:16.1: enabled 0
PCI: 00:16.2: enabled 0
PCI: 00:16.3: enabled 0
PCI: 00:19.0: enabled 1
PCI: 00:1a.0: enabled 1
PCI: 00:1b.0: enabled 1
PCI: 00:1c.0: enabled 1
PCI: 00:1c.1: enabled 1
PCI: 00:1c.2: enabled 1
PCI: 00:1c.3: enabled 0
PCI: 00:1c.4: enabled 0
PCI: 00:1c.5: enabled 0
PCI: 00:1c.6: enabled 0
PCI: 00:1c.7: enabled 0
PCI: 00:1d.0: enabled 1
PCI: 00:1e.0: enabled 0
PCI: 00:1f.0: enabled 1
PCI: 00:1f.2: enabled 1
PCI: 00:1f.3: enabled 1
PCI: 00:1f.5: enabled 0
PCI: 00:1f.6: enabled 1
PCI: 00:00.0: enabled 1
PNP: 00ff.1: enabled 1
PNP: 0c31.0: enabled 1
PNP: 00ff.2: enabled 1
I2C: 00:54: enabled 1
I2C: 00:55: enabled 1
I2C: 00:56: enabled 1
I2C: 00:57: enabled 1
I2C: 00:5c: enabled 1
I2C: 00:5d: enabled 1
I2C: 00:5e: enabled 1
I2C: 00:5f: enabled 1
Compare with tree...
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
APIC: acac: enabled 0
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 0
PCI: 00:02.0: enabled 1
PCI: 00:14.0: enabled 1
PCI: 00:16.0: enabled 1
PCI: 00:16.1: enabled 0
PCI: 00:16.2: enabled 0
PCI: 00:16.3: enabled 0
PCI: 00:19.0: enabled 1
PCI: 00:1a.0: enabled 1
PCI: 00:1b.0: enabled 1
PCI: 00:1c.0: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:1c.1: enabled 1
PCI: 00:1c.2: enabled 1
PCI: 00:1c.3: enabled 0
PCI: 00:1c.4: enabled 0
PCI: 00:1c.5: enabled 0
PCI: 00:1c.6: enabled 0
PCI: 00:1c.7: enabled 0
PCI: 00:1d.0: enabled 1
PCI: 00:1e.0: enabled 0
PCI: 00:1f.0: enabled 1
PNP: 00ff.1: enabled 1
PNP: 0c31.0: enabled 1
PNP: 00ff.2: enabled 1
PCI: 00:1f.2: enabled 1
PCI: 00:1f.3: enabled 1
I2C: 00:54: enabled 1
I2C: 00:55: enabled 1
I2C: 00:56: enabled 1
I2C: 00:57: enabled 1
I2C: 00:5c: enabled 1
I2C: 00:5d: enabled 1
I2C: 00:5e: enabled 1
I2C: 00:5f: enabled 1
PCI: 00:1f.5: enabled 0
PCI: 00:1f.6: enabled 1
Root Device scanning...
scan_static_bus for Root Device
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
PCI: 00:00.0 [8086/0000] ops
PCI: 00:00.0 [8086/0154] enabled
PCI: 00:01.0 [8086/0000] bus ops
PCI: 00:01.0 [8086/0151] disabled
PCI: 00:02.0 [8086/0000] ops
PCI: 00:02.0 [8086/0166] enabled
PCI: 00:04.0 [8086/0153] enabled
PCI: 00:14.0 [8086/0000] ops
PCI: 00:14.0 [8086/1e31] enabled
PCI: 00:16.0 [8086/1e3a] ops
PCI: 00:16.0 [8086/1e3a] enabled
PCI: 00:16.1: Disabling device
PCI: 00:16.2: Disabling device
PCI: 00:16.3: Disabling device
PCI: 00:19.0 [8086/1502] enabled
PCI: 00:1a.0 [8086/0000] ops
PCI: 00:1a.0 [8086/1e2d] enabled
PCI: 00:1b.0 [8086/0000] ops
PCI: 00:1b.0 [8086/1e20] enabled
PCH: PCIe Root Port coalescing is enabled
PCI: 00:1c.0 [8086/0000] bus ops
PCI: 00:1c.0 [8086/1e10] enabled
PCI: 00:1c.1 [8086/0000] bus ops
PCI: 00:1c.1 [8086/1e12] enabled
PCI: 00:1c.2 [8086/0000] bus ops
PCI: 00:1c.2 [8086/1e14] enabled
PCI: 00:1c.3: Disabling device
PCI: 00:1c.3 [8086/0000] bus ops
PCI: 00:1c.3 [8086/1e16] disabled
PCI: 00:1c.4: Disabling device
PCI: 00:1c.4: check set enabled
PCI: 00:1c.5: Disabling device
PCI: 00:1c.6: Disabling device
PCI: 00:1c.7: Disabling device
PCH: RPFN 0x76543210 -> 0xfedcb210
PCI: 00:1d.0 [8086/0000] ops
PCI: 00:1d.0 [8086/1e26] enabled
PCI: 00:1e.0: Disabling device
PCI: 00:1e.0 [8086/2448] bus ops
PCI: 00:1e.0 [8086/2448] disabled
PCI: 00:1f.0 [8086/0000] bus ops
PCI: 00:1f.0 [8086/1e55] enabled
PCI: 00:1f.2 [8086/0000] ops
PCI: 00:1f.2 [8086/1e01] enabled
PCI: 00:1f.3 [8086/0000] bus ops
PCI: 00:1f.3 [8086/1e22] enabled
PCI: 00:1f.5: Disabling device
PCI: 00:1f.5 [8086/1e09] disabled No operations
PCI: 00:1f.6 [8086/1e24] enabled
PCI: Leftover static devices:
PCI: 00:16.1
PCI: 00:16.2
PCI: 00:16.3
PCI: 00:1c.4
PCI: 00:1c.5
PCI: 00:1c.6
PCI: 00:1c.7
PCI: Check your devicetree.cb.
PCI: 00:1c.0 scanning...
do_pci_scan_bridge for PCI: 00:1c.0
PCI: 00:1c.0: No LTR support
PCI: pci_scan_bus for bus 01
PCI: 01:00.0 [1180/0000] ops
PCI: 01:00.0 [1180/e823] enabled
Enabling Common Clock Configuration
ASPM: Enabled L0s and L1
PCIe: Max_Payload_Size adjusted to 128
PCI: 01:00.0: No LTR support
scan_bus: bus PCI: 00:1c.0 finished in 0 msecs
PCI: 00:1c.1 scanning...
do_pci_scan_bridge for PCI: 00:1c.1
PCI: 00:1c.1: No LTR support
PCI: pci_scan_bus for bus 02
PCI: 02:00.0 [168c/002a] enabled
Enabling Common Clock Configuration
ASPM: Enabled L1
PCIe: Max_Payload_Size adjusted to 128
PCI: 02:00.0: No LTR support
scan_bus: bus PCI: 00:1c.1 finished in 0 msecs
PCI: 00:1c.2 scanning...
do_pci_scan_bridge for PCI: 00:1c.2
PCI: 00:1c.2: No LTR support
PCI: pci_scan_bus for bus 03
scan_bus: bus PCI: 00:1c.2 finished in 0 msecs
PCI: 00:1f.0 scanning...
scan_static_bus for PCI: 00:1f.0
PMH7: ID 05 Revision 00
PNP: 00ff.1 enabled
PNP: 0c31.0 enabled
Clearing EC output queue...
EC output queue has been cleared.
recv_ec_data: 0x47
recv_ec_data: 0x32
recv_ec_data: 0x48
recv_ec_data: 0x54
recv_ec_data: 0x33
recv_ec_data: 0x35
recv_ec_data: 0x57
recv_ec_data: 0x57
recv_ec_data: 0x16
recv_ec_data: 0x03
recv_ec_data: 0x40
recv_ec_data: 0x11
H8: EC Firmware ID G2HT35WW-3.22, Version 4.01B
recv_ec_data: 0x01
recv_ec_data: 0x30
recv_ec_data: 0x90
H8: BDC detection not implemented. Assuming BDC installed
recv_ec_data: 0x30
H8: WWAN not installed
recv_ec_data: 0x30
recv_ec_data: 0x00
recv_ec_data: 0xa6
recv_ec_data: 0xa6
recv_ec_data: 0x30
PNP: 00ff.2 enabled
scan_static_bus for PCI: 00:1f.0 done
scan_bus: bus PCI: 00:1f.0 finished in 4 msecs
PCI: 00:1f.3 scanning...
scan_generic_bus for PCI: 00:1f.3
I2C: 01:54 enabled
bus: PCI: 00:1f.3[0]->I2C: 01:55 enabled
bus: PCI: 00:1f.3[0]->I2C: 01:56 enabled
bus: PCI: 00:1f.3[0]->I2C: 01:57 enabled
bus: PCI: 00:1f.3[0]->I2C: 01:5c enabled
bus: PCI: 00:1f.3[0]->I2C: 01:5d enabled
bus: PCI: 00:1f.3[0]->I2C: 01:5e enabled
bus: PCI: 00:1f.3[0]->I2C: 01:5f enabled
bus: PCI: 00:1f.3[0]->scan_generic_bus for PCI: 00:1f.3 done
scan_bus: bus PCI: 00:1f.3 finished in 0 msecs
scan_bus: bus DOMAIN: 0000 finished in 5 msecs
scan_static_bus for Root Device done
scan_bus: bus Root Device finished in 5 msecs
done
BS: BS_DEV_ENUMERATE run times (exec / console): 6 / 0 ms
FMAP: area RW_MRC_CACHE found @ 800000 (65536 bytes)
MRC: No data in cbmem for 'RW_MRC_CACHE'.
found VGA at PCI: 00:02.0
Setting up VGA for PCI: 00:02.0
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
DOMAIN: 0000 read_resources bus 0 link: 0
Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000.
TOUUD 0x47d600000 TOLUD 0x82a00000 TOM 0x400000000
MEBASE 0x7ffff00000
IGD decoded, subtracting 32M UMA and 2M GTT
TSEG base 0x80000000 size 8M
Available memory below 4GB: 2048M
Available memory above 4GB: 14294M
PCI: 00:1c.0 read_resources bus 1 link: 0
PCI: 00:1c.0 read_resources bus 1 link: 0 done
PCI: 00:1c.1 read_resources bus 2 link: 0
PCI: 00:1c.1 read_resources bus 2 link: 0 done
PCI: 00:1c.2 read_resources bus 3 link: 0
PCI: 00:1c.2 read_resources bus 3 link: 0 done
PCI: 00:1f.0 read_resources bus 0 link: 0
PNP: 00ff.1 missing read_resources
PNP: 00ff.2 missing read_resources
PCI: 00:1f.0 read_resources bus 0 link: 0 done
PCI: 00:1f.3 read_resources bus 1 link: 0
PCI: 00:1f.3 read_resources bus 1 link: 0 done
DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
Root Device child on link 0 CPU_CLUSTER: 0
CPU_CLUSTER: 0 child on link 0 APIC: 00
APIC: 00
APIC: acac
DOMAIN: 0000 child on link 0 PCI: 00:00.0
DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit fffffffff flags 40040200 index 10000100
PCI: 00:00.0
PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60
PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3
PCI: 00:00.0 resource base 100000 size 7ff00000 align 0 gran 0 limit 0 flags e0004200 index 4
PCI: 00:00.0 resource base 100000000 size 37d600000 align 0 gran 0 limit 0 flags e0004200 index 5
PCI: 00:00.0 resource base 80000000 size 2a00000 align 0 gran 0 limit 0 flags f0000200 index 6
PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 8
PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
PCI: 00:01.0
PCI: 00:02.0
PCI: 00:02.0 resource base 0 size 400000 align 22 gran 22 limit ffffffffffffffff flags 201 index 10
PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
PCI: 00:04.0
PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
PCI: 00:14.0
PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
PCI: 00:16.0
PCI: 00:16.0 resource base 0 size 10 align 12 gran 4 limit ffffffffffffffff flags 201 index 10
PCI: 00:19.0
PCI: 00:19.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14
PCI: 00:19.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18
PCI: 00:1a.0
PCI: 00:1a.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10
PCI: 00:1b.0
PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
PCI: 00:1c.0 child on link 0 PCI: 01:00.0
PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 01:00.0
PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
PCI: 00:1c.1 child on link 0 PCI: 02:00.0
PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 02:00.0
PCI: 02:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
PCI: 00:1c.2 child on link 0 NONE
PCI: 00:1c.2 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
NONE
NONE resource base 0 size 800000 align 12 gran 12 limit ffffffff flags 200 index 10
NONE resource base 0 size 10000000 align 12 gran 12 limit ffffffffffffffff flags 101200 index 14
NONE resource base 0 size 2000 align 12 gran 12 limit ffff flags 100 index 18
PCI: 00:1c.3
PCI: 00:1d.0
PCI: 00:1d.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10
PCI: 00:1e.0
PCI: 00:1f.0 child on link 0 PNP: 00ff.1
PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100
PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
PCI: 00:1f.0 resource base 1600 size 7c align 0 gran 0 limit 0 flags c0040100 index 10000200
PCI: 00:1f.0 resource base 15e0 size c align 0 gran 0 limit 0 flags c0040100 index 10000300
PNP: 00ff.1
PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77
PNP: 0c31.0
PNP: 0c31.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 0c31.0 resource base fed40000 size 5000 align 0 gran 0 limit 0 flags f0000200 index 0
PNP: 00ff.2
PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64
PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66
PCI: 00:1f.2
PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
PCI: 00:1f.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
PCI: 00:1f.2 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
PCI: 00:1f.3 child on link 0 I2C: 01:54
PCI: 00:1f.3 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
I2C: 01:54
I2C: 01:55
I2C: 01:56
I2C: 01:57
I2C: 01:5c
I2C: 01:5d
I2C: 01:5e
I2C: 01:5f
PCI: 00:1f.5
PCI: 00:1f.6
PCI: 00:1f.6 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 01:00.0 10 * [0x0 - 0xff] mem
PCI: 00:1c.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1c.1 io: size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1c.1 io: size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.1 mem: size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 02:00.0 10 * [0x0 - 0xffff] mem
PCI: 00:1c.1 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:1c.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:1c.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1c.2 io: size: 0 align: 12 gran: 12 limit: ffff
NONE 18 * [0x0 - 0x1fff] io
PCI: 00:1c.2 io: size: 2000 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.2 mem: size: 0 align: 20 gran: 20 limit: ffffffff
NONE 10 * [0x0 - 0x7fffff] mem
PCI: 00:1c.2 mem: size: 800000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:1c.2 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
NONE 14 * [0x0 - 0xfffffff] prefmem
PCI: 00:1c.2 prefmem: size: 10000000 align: 20 gran: 20 limit: ffffffffffffffff done
=== Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
update_constraints: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed)
update_constraints: PCI: 00:1f.0 10000200 base 00001600 limit 0000167b io (fixed)
update_constraints: PCI: 00:1f.0 10000300 base 000015e0 limit 000015eb io (fixed)
update_constraints: PNP: 00ff.1 77 base 000015e0 limit 000015ef io (fixed)
update_constraints: PCI: 00:1f.3 20 base 00000400 limit 0000041f io (fixed)
DOMAIN: 0000: Resource ranges:
* Base: 1000, Size: 5e0, Tag: 100
* Base: 15f0, Size: 10, Tag: 100
* Base: 167c, Size: e984, Tag: 100
PCI: 00:1c.2 1c * [0x2000 - 0x3fff] limit: 3fff io
PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
PCI: 00:19.0 18 * [0x1040 - 0x105f] limit: 105f io
PCI: 00:1f.2 20 * [0x1060 - 0x107f] limit: 107f io
PCI: 00:1f.2 10 * [0x1080 - 0x1087] limit: 1087 io
PCI: 00:1f.2 18 * [0x1088 - 0x108f] limit: 108f io
PCI: 00:1f.2 14 * [0x1090 - 0x1093] limit: 1093 io
PCI: 00:1f.2 1c * [0x1094 - 0x1097] limit: 1097 io
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: fffffffff
update_constraints: PCI: 00:00.0 60 base f0000000 limit f3ffffff mem (fixed)
update_constraints: PCI: 00:00.0 03 base 00000000 limit 0009ffff mem (fixed)
update_constraints: PCI: 00:00.0 04 base 00100000 limit 7fffffff mem (fixed)
update_constraints: PCI: 00:00.0 05 base 100000000 limit 47d5fffff mem (fixed)
update_constraints: PCI: 00:00.0 06 base 80000000 limit 829fffff mem (fixed)
update_constraints: PCI: 00:00.0 07 base 000a0000 limit 000bffff mem (fixed)
update_constraints: PCI: 00:00.0 08 base 000c0000 limit 000fffff mem (fixed)
update_constraints: PCI: 00:00.0 09 base fed90000 limit fed90fff mem (fixed)
update_constraints: PCI: 00:00.0 0a base fed91000 limit fed91fff mem (fixed)
update_constraints: PCI: 00:1f.0 10000100 base ff000000 limit ffffffff mem (fixed)
update_constraints: PCI: 00:1f.0 03 base fec00000 limit fec00fff mem (fixed)
update_constraints: PNP: 0c31.0 00 base fed40000 limit fed44fff mem (fixed)
DOMAIN: 0000: Resource ranges:
* Base: 82a00000, Size: 6d600000, Tag: 200
* Base: f4000000, Size: ac00000, Tag: 200
* Base: fec01000, Size: 13f000, Tag: 200
* Base: fed45000, Size: 4b000, Tag: 200
* Base: fed92000, Size: 26e000, Tag: 200
* Base: 47d600000, Size: b82a00000, Tag: 100200
PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
PCI: 00:02.0 10 * [0x82c00000 - 0x82ffffff] limit: 82ffffff mem
PCI: 00:1c.2 20 * [0x83000000 - 0x837fffff] limit: 837fffff mem
PCI: 00:1c.0 20 * [0x82a00000 - 0x82afffff] limit: 82afffff mem
PCI: 00:1c.1 20 * [0x82b00000 - 0x82bfffff] limit: 82bfffff mem
PCI: 00:19.0 10 * [0x83800000 - 0x8381ffff] limit: 8381ffff mem
PCI: 00:14.0 10 * [0x83820000 - 0x8382ffff] limit: 8382ffff mem
PCI: 00:04.0 10 * [0x83830000 - 0x83837fff] limit: 83837fff mem
PCI: 00:1b.0 10 * [0x83838000 - 0x8383bfff] limit: 8383bfff mem
PCI: 00:19.0 14 * [0x8383c000 - 0x8383cfff] limit: 8383cfff mem
PCI: 00:1f.6 10 * [0x8383d000 - 0x8383dfff] limit: 8383dfff mem
PCI: 00:1f.2 24 * [0x8383e000 - 0x8383e7ff] limit: 8383e7ff mem
PCI: 00:1a.0 10 * [0x8383f000 - 0x8383f3ff] limit: 8383f3ff mem
PCI: 00:1d.0 10 * [0x83840000 - 0x838403ff] limit: 838403ff mem
PCI: 00:1f.3 10 * [0x83841000 - 0x838410ff] limit: 838410ff mem
PCI: 00:16.0 10 * [0x83842000 - 0x8384200f] limit: 8384200f mem
PCI: 00:1c.2 24 * [0x47d600000 - 0x48d5fffff] limit: 48d5fffff prefmem
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: fffffffff done
PCI: 00:1c.0 mem: base: 82a00000 size: 100000 align: 20 gran: 20 limit: 82afffff
PCI: 00:1c.0: Resource ranges:
* Base: 82a00000, Size: 100000, Tag: 200
PCI: 01:00.0 10 * [0x82a00000 - 0x82a000ff] limit: 82a000ff mem
PCI: 00:1c.0 mem: base: 82a00000 size: 100000 align: 20 gran: 20 limit: 82afffff done
PCI: 00:1c.1 mem: base: 82b00000 size: 100000 align: 20 gran: 20 limit: 82bfffff
PCI: 00:1c.1: Resource ranges:
* Base: 82b00000, Size: 100000, Tag: 200
PCI: 02:00.0 10 * [0x82b00000 - 0x82b0ffff] limit: 82b0ffff mem
PCI: 00:1c.1 mem: base: 82b00000 size: 100000 align: 20 gran: 20 limit: 82bfffff done
PCI: 00:1c.2 io: base: 2000 size: 2000 align: 12 gran: 12 limit: 3fff
PCI: 00:1c.2: Resource ranges:
* Base: 2000, Size: 2000, Tag: 100
NONE 18 * [0x2000 - 0x3fff] limit: 3fff io
PCI: 00:1c.2 io: base: 2000 size: 2000 align: 12 gran: 12 limit: 3fff done
PCI: 00:1c.2 prefmem: base: 47d600000 size: 10000000 align: 20 gran: 20 limit: 48d5fffff
PCI: 00:1c.2: Resource ranges:
* Base: 47d600000, Size: 10000000, Tag: 1200
NONE 14 * [0x47d600000 - 0x48d5fffff] limit: 48d5fffff prefmem
PCI: 00:1c.2 prefmem: base: 47d600000 size: 10000000 align: 20 gran: 20 limit: 48d5fffff done
PCI: 00:1c.2 mem: base: 83000000 size: 800000 align: 20 gran: 20 limit: 837fffff
PCI: 00:1c.2: Resource ranges:
* Base: 83000000, Size: 800000, Tag: 200
NONE 10 * [0x83000000 - 0x837fffff] limit: 837fffff mem
PCI: 00:1c.2 mem: base: 83000000 size: 800000 align: 20 gran: 20 limit: 837fffff done
=== Resource allocator: DOMAIN: 0000 - resource allocation complete ===
Root Device assign_resources, bus 0 link: 0
DOMAIN: 0000 assign_resources, bus 0 link: 0
PCI: 00:02.0 10 <- [0x0082c00000 - 0x0082ffffff] size 0x00400000 gran 0x16 mem64
PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64
PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
PCI: 00:04.0 10 <- [0x0083830000 - 0x0083837fff] size 0x00008000 gran 0x0f mem64
PCI: 00:14.0 10 <- [0x0083820000 - 0x008382ffff] size 0x00010000 gran 0x10 mem64
PCI: 00:16.0 10 <- [0x0083842000 - 0x008384200f] size 0x00000010 gran 0x04 mem64
PCI: 00:19.0 10 <- [0x0083800000 - 0x008381ffff] size 0x00020000 gran 0x11 mem
PCI: 00:19.0 14 <- [0x008383c000 - 0x008383cfff] size 0x00001000 gran 0x0c mem
PCI: 00:19.0 18 <- [0x0000001040 - 0x000000105f] size 0x00000020 gran 0x05 io
PCI: 00:1a.0 10 <- [0x008383f000 - 0x008383f3ff] size 0x00000400 gran 0x0a mem
PCI: 00:1b.0 10 <- [0x0083838000 - 0x008383bfff] size 0x00004000 gran 0x0e mem64
PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
PCI: 00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
PCI: 00:1c.0 20 <- [0x0082a00000 - 0x0082afffff] size 0x00100000 gran 0x14 bus 01 mem
PCI: 00:1c.0 assign_resources, bus 1 link: 0
PCI: 01:00.0 10 <- [0x0082a00000 - 0x0082a000ff] size 0x00000100 gran 0x08 mem
PCI: 00:1c.0 assign_resources, bus 1 link: 0 done
PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io
PCI: 00:1c.1 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
PCI: 00:1c.1 20 <- [0x0082b00000 - 0x0082bfffff] size 0x00100000 gran 0x14 bus 02 mem
PCI: 00:1c.1 assign_resources, bus 2 link: 0
PCI: 02:00.0 10 <- [0x0082b00000 - 0x0082b0ffff] size 0x00010000 gran 0x10 mem64
PCI: 00:1c.1 assign_resources, bus 2 link: 0 done
PCI: 00:1c.2 1c <- [0x0000002000 - 0x0000003fff] size 0x00002000 gran 0x0c bus 03 io
PCI: 00:1c.2 24 <- [0x047d600000 - 0x048d5fffff] size 0x10000000 gran 0x14 bus 03 prefmem
PCI: 00:1c.2 20 <- [0x0083000000 - 0x00837fffff] size 0x00800000 gran 0x14 bus 03 mem
PCI: 00:1c.2 assign_resources, bus 3 link: 0
NONE missing set_resources
PCI: 00:1c.2 assign_resources, bus 3 link: 0 done
PCI: 00:1d.0 10 <- [0x0083840000 - 0x00838403ff] size 0x00000400 gran 0x0a mem
PCI: 00:1f.0 assign_resources, bus 0 link: 0
PNP: 00ff.1 missing set_resources
PNP: 00ff.2 missing set_resources
PCI: 00:1f.0 assign_resources, bus 0 link: 0 done
PCI: 00:1f.2 10 <- [0x0000001080 - 0x0000001087] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 14 <- [0x0000001090 - 0x0000001093] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 18 <- [0x0000001088 - 0x000000108f] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 1c <- [0x0000001094 - 0x0000001097] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 20 <- [0x0000001060 - 0x000000107f] size 0x00000020 gran 0x05 io
PCI: 00:1f.2 24 <- [0x008383e000 - 0x008383e7ff] size 0x00000800 gran 0x0b mem
PCI: 00:1f.3 10 <- [0x0083841000 - 0x00838410ff] size 0x00000100 gran 0x08 mem64
PCI: 00:1f.3 assign_resources, bus 1 link: 0
PCI: 00:1f.3 assign_resources, bus 1 link: 0 done
PCI: 00:1f.6 10 <- [0x008383d000 - 0x008383dfff] size 0x00001000 gran 0x0c mem64
DOMAIN: 0000 assign_resources, bus 0 link: 0 done
Root Device assign_resources, bus 0 link: 0 done
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
Root Device child on link 0 CPU_CLUSTER: 0
CPU_CLUSTER: 0 child on link 0 APIC: 00
APIC: 00
APIC: acac
DOMAIN: 0000 child on link 0 PCI: 00:00.0
DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit fffffffff flags 40040200 index 10000100
PCI: 00:00.0
PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60
PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3
PCI: 00:00.0 resource base 100000 size 7ff00000 align 0 gran 0 limit 0 flags e0004200 index 4
PCI: 00:00.0 resource base 100000000 size 37d600000 align 0 gran 0 limit 0 flags e0004200 index 5
PCI: 00:00.0 resource base 80000000 size 2a00000 align 0 gran 0 limit 0 flags f0000200 index 6
PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 8
PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
PCI: 00:01.0
PCI: 00:02.0
PCI: 00:02.0 resource base 82c00000 size 400000 align 22 gran 22 limit 82ffffff flags 60000201 index 10
PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
PCI: 00:04.0
PCI: 00:04.0 resource base 83830000 size 8000 align 15 gran 15 limit 83837fff flags 60000201 index 10
PCI: 00:14.0
PCI: 00:14.0 resource base 83820000 size 10000 align 16 gran 16 limit 8382ffff flags 60000201 index 10
PCI: 00:16.0
PCI: 00:16.0 resource base 83842000 size 10 align 12 gran 4 limit 8384200f flags 60000201 index 10
PCI: 00:19.0
PCI: 00:19.0 resource base 83800000 size 20000 align 17 gran 17 limit 8381ffff flags 60000200 index 10
PCI: 00:19.0 resource base 8383c000 size 1000 align 12 gran 12 limit 8383cfff flags 60000200 index 14
PCI: 00:19.0 resource base 1040 size 20 align 5 gran 5 limit 105f flags 60000100 index 18
PCI: 00:1a.0
PCI: 00:1a.0 resource base 8383f000 size 400 align 12 gran 10 limit 8383f3ff flags 60000200 index 10
PCI: 00:1b.0
PCI: 00:1b.0 resource base 83838000 size 4000 align 14 gran 14 limit 8383bfff flags 60000201 index 10
PCI: 00:1c.0 child on link 0 PCI: 01:00.0
PCI: 00:1c.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
PCI: 00:1c.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
PCI: 00:1c.0 resource base 82a00000 size 100000 align 20 gran 20 limit 82afffff flags 60080202 index 20
PCI: 01:00.0
PCI: 01:00.0 resource base 82a00000 size 100 align 12 gran 8 limit 82a000ff flags 60000200 index 10
PCI: 00:1c.1 child on link 0 PCI: 02:00.0
PCI: 00:1c.1 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
PCI: 00:1c.1 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
PCI: 00:1c.1 resource base 82b00000 size 100000 align 20 gran 20 limit 82bfffff flags 60080202 index 20
PCI: 02:00.0
PCI: 02:00.0 resource base 82b00000 size 10000 align 16 gran 16 limit 82b0ffff flags 60000201 index 10
PCI: 00:1c.2 child on link 0 NONE
PCI: 00:1c.2 resource base 2000 size 2000 align 12 gran 12 limit 3fff flags 60080102 index 1c
PCI: 00:1c.2 resource base 47d600000 size 10000000 align 20 gran 20 limit 48d5fffff flags 60181202 index 24
PCI: 00:1c.2 resource base 83000000 size 800000 align 20 gran 20 limit 837fffff flags 60080202 index 20
NONE
NONE resource base 83000000 size 800000 align 12 gran 12 limit 837fffff flags 40000200 index 10
NONE resource base 47d600000 size 10000000 align 12 gran 12 limit 48d5fffff flags 40101200 index 14
NONE resource base 2000 size 2000 align 12 gran 12 limit 3fff flags 40000100 index 18
PCI: 00:1c.3
PCI: 00:1d.0
PCI: 00:1d.0 resource base 83840000 size 400 align 12 gran 10 limit 838403ff flags 60000200 index 10
PCI: 00:1e.0
PCI: 00:1f.0 child on link 0 PNP: 00ff.1
PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100
PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
PCI: 00:1f.0 resource base 1600 size 7c align 0 gran 0 limit 0 flags c0040100 index 10000200
PCI: 00:1f.0 resource base 15e0 size c align 0 gran 0 limit 0 flags c0040100 index 10000300
PNP: 00ff.1
PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77
PNP: 0c31.0
PNP: 0c31.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 0c31.0 resource base fed40000 size 5000 align 0 gran 0 limit 0 flags f0000200 index 0
PNP: 00ff.2
PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64
PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66
PCI: 00:1f.2
PCI: 00:1f.2 resource base 1080 size 8 align 3 gran 3 limit 1087 flags 60000100 index 10
PCI: 00:1f.2 resource base 1090 size 4 align 2 gran 2 limit 1093 flags 60000100 index 14
PCI: 00:1f.2 resource base 1088 size 8 align 3 gran 3 limit 108f flags 60000100 index 18
PCI: 00:1f.2 resource base 1094 size 4 align 2 gran 2 limit 1097 flags 60000100 index 1c
PCI: 00:1f.2 resource base 1060 size 20 align 5 gran 5 limit 107f flags 60000100 index 20
PCI: 00:1f.2 resource base 8383e000 size 800 align 12 gran 11 limit 8383e7ff flags 60000200 index 24
PCI: 00:1f.3 child on link 0 I2C: 01:54
PCI: 00:1f.3 resource base 83841000 size 100 align 12 gran 8 limit 838410ff flags 60000201 index 10
PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
I2C: 01:54
I2C: 01:55
I2C: 01:56
I2C: 01:57
I2C: 01:5c
I2C: 01:5d
I2C: 01:5e
I2C: 01:5f
PCI: 00:1f.5
PCI: 00:1f.6
PCI: 00:1f.6 resource base 8383d000 size 1000 align 12 gran 12 limit 8383dfff flags 60000201 index 10
Done allocating resources.
BS: BS_DEV_RESOURCES run times (exec / console): 1 / 1 ms
Enabling resources...
PCI: 00:00.0 subsystem <- 8086/0154
PCI: 00:00.0 cmd <- 06
PCI: 00:02.0 subsystem <- 8086/0166
PCI: 00:02.0 cmd <- 03
PCI: 00:04.0 cmd <- 02
PCI: 00:14.0 subsystem <- 8086/1e31
PCI: 00:14.0 cmd <- 102
PCI: 00:16.0 subsystem <- 8086/1e3a
PCI: 00:16.0 cmd <- 02
PCI: 00:19.0 subsystem <- 17aa/21f3
PCI: 00:19.0 cmd <- 103
PCI: 00:1a.0 subsystem <- 8086/1e2d
PCI: 00:1a.0 cmd <- 102
PCI: 00:1b.0 subsystem <- 8086/1e20
PCI: 00:1b.0 cmd <- 102
PCI: 00:1c.0 bridge ctrl <- 0013
PCI: 00:1c.0 subsystem <- 8086/1e10
PCI: 00:1c.0 cmd <- 106
PCI: 00:1c.1 bridge ctrl <- 0013
PCI: 00:1c.1 subsystem <- 8086/1e12
PCI: 00:1c.1 cmd <- 106
PCI: 00:1c.2 bridge ctrl <- 0013
PCI: 00:1c.2 subsystem <- 8086/1e14
PCI: 00:1c.2 cmd <- 107
PCI: 00:1d.0 subsystem <- 8086/1e26
PCI: 00:1d.0 cmd <- 102
PCI: 00:1f.0 subsystem <- 8086/1e55
PCI: 00:1f.0 cmd <- 107
PCI: 00:1f.2 subsystem <- 8086/1e03
PCI: 00:1f.2 cmd <- 03
PCI: 00:1f.3 subsystem <- 8086/1e22
PCI: 00:1f.3 cmd <- 103
PCI: 00:1f.6 subsystem <- 8086/1e24
PCI: 00:1f.6 cmd <- 02
PCI: 01:00.0 subsystem <- 1180/e823
PCI: 01:00.0 cmd <- 06
PCI: 02:00.0 cmd <- 02
done.
Found TPM ST33ZP24 by ST Microelectronics
TPM: Startup
TPM: command 0x99 returned 0x0
TPM: Asserting physical presence
TPM: command 0x4000000a returned 0x0
TPM: command 0x65 returned 0x801
TPM: Continue self test
TPM: command 0x53 returned 0x0
TPM: command 0x65 returned 0x0
TPM: flags disable=0, deactivated=0, nvlocked=1
TPM: setup succeeded
BS: BS_DEV_INIT entry times (exec / console): 138 / 0 ms
Initializing devices...
CPU_CLUSTER: 0 init
MTRR: Physical address space:
0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
0x00000000000c0000 - 0x0000000080000000 size 0x7ff40000 type 6
0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 0
0x0000000090000000 - 0x00000000a0000000 size 0x10000000 type 1
0x00000000a0000000 - 0x0000000100000000 size 0x60000000 type 0
0x0000000100000000 - 0x000000047d600000 size 0x37d600000 type 6
0x000000047d600000 - 0x000000048d600000 size 0x10000000 type 0
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 36 bits
MTRR: default type WB/UC MTRR counts: 12/8.
MTRR: UC selected as default type.
MTRR: 0 base 0x0000000000000000 mask 0x0000000f80000000 type 6
MTRR: 1 base 0x0000000090000000 mask 0x0000000ff0000000 type 1
MTRR: 2 base 0x0000000100000000 mask 0x0000000f00000000 type 6
MTRR: 3 base 0x0000000200000000 mask 0x0000000e00000000 type 6
MTRR: 4 base 0x0000000400000000 mask 0x0000000f80000000 type 6
MTRR: 5 base 0x000000047d600000 mask 0x0000000fffe00000 type 0
MTRR: 6 base 0x000000047d800000 mask 0x0000000fff800000 type 0
MTRR: 7 base 0x000000047e000000 mask 0x0000000ffe000000 type 0
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
CPU has 2 cores, 4 threads enabled.
Setting up SMI for CPU
Will perform SMM setup.
CBFS: Found 'cpu_microcode_blob.bin' @0x13780 size 0x6800 in mcache @0x7fffd0ac
microcode: sig=0x306a9 pf=0x10 revision=0x21
CPU: Intel(R) Core(TM) i7-3520M CPU @ 2.90GHz.
Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
Processing 16 relocs. Offset value of 0x00030000
Attempting to start 3 APs
Waiting for 10ms after sending INIT.
Waiting for 1st SIPI to complete...done.
Waiting for 2nd SIPI to complete...done.
AP: slot 1 apic_id 1, MCU rev: 0x00000021
AP: slot 2 apic_id 3, MCU rev: 0x00000021
AP: slot 3 apic_id 2, MCU rev: 0x00000021
smm_setup_relocation_handler: enter
smm_stub_place_stacks: cpus: 4 : stack space: needed -> 1000
smm_stub_place_stacks: exit, stack_top 0x80001000
Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1a8 memsize: 0x1a8
Processing 11 relocs. Offset value of 0x00038000
smm_module_setup_stub: stack_end = 0x80000000
smm_module_setup_stub: stack_top = 0x80001000
smm_module_setup_stub: stack_size = 0x400
smm_module_setup_stub: runtime.start32_offset = 0x4c
smm_module_setup_stub: runtime.smm_size = 0x10000
SMM Module: stub loaded at 0x00038000. Will call 0x7ff9b3f9
Installing permanent SMM handler to 0x80000000
smm_load_module: total_smm_space_needed 7750, available -> 300000
Loading module at 0x802fa000 with entry 0x802fa6d0. filesize: 0x1f08 memsize: 0x5f50
Processing 93 relocs. Offset value of 0x802fa000
smm_load_module: smram_start: 0x0x80000000
smm_load_module: smram_end: 0x80300000
smm_load_module: stack_top: 0x80001000
smm_load_module: handler start 0x802fa6d0
smm_load_module: handler_size 66a0
smm_load_module: fxsave_area 0x802ff800
smm_load_module: fxsave_size 800
smm_load_module: CONFIG_MSEG_SIZE 0x0
smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0
smm_load_module: handler_mod_params.smbase = 0x80000000
smm_load_module: per_cpu_save_state_size = 0x400
smm_load_module: num_cpus = 0x4
smm_load_module: total_save_state_size = 0x1000
smm_load_module: cpu0 entry: 0x802ea000
smm_create_map: cpus allowed in one segment 30
smm_create_map: min # of segments needed 1
CPU 0x0
smbase 802ea000 entry 802f2000
ss_start 802f9c00 code_end 802f21a8
CPU 0x1
smbase 802e9c00 entry 802f1c00
ss_start 802f9800 code_end 802f1da8
CPU 0x2
smbase 802e9800 entry 802f1800
ss_start 802f9400 code_end 802f19a8
CPU 0x3
smbase 802e9400 entry 802f1400
ss_start 802f9000 code_end 802f15a8
smm_stub_place_stacks: cpus: 4 : stack space: needed -> 1000
smm_stub_place_stacks: exit, stack_top 0x80001000
Loading module at 0x802f2000 with entry 0x802f2000. filesize: 0x1a8 memsize: 0x1a8
Processing 11 relocs. Offset value of 0x802f2000
smm_place_entry_code: smbase 802e9400, stack_top 80001000
SMM Module: placing smm entry code at 802f1c00, cpu # 0x1
smm_place_entry_code: copying from 802f2000 to 802f1c00 0x1a8 bytes
SMM Module: placing smm entry code at 802f1800, cpu # 0x2
smm_place_entry_code: copying from 802f2000 to 802f1800 0x1a8 bytes
SMM Module: placing smm entry code at 802f1400, cpu # 0x3
smm_place_entry_code: copying from 802f2000 to 802f1400 0x1a8 bytes
smm_module_setup_stub: stack_end = 0x80000000
smm_module_setup_stub: stack_top = 0x80001000
smm_module_setup_stub: stack_size = 0x400
smm_module_setup_stub: runtime.start32_offset = 0x4c
smm_module_setup_stub: runtime.smm_size = 0x300000
SMM Module: stub loaded at 0x802f2000. Will call 0x802fa6d0
Initializing southbridge SMI... ... pmbase = 0x0500
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802ea000, cpu = 0
In relocation handler: cpu 0
New SMBASE=0x802ea000 IEDBASE=0x80400000
SMM revision: 0x00030101
Writing SMRR. base = 0x80000006, mask=0xff800800
Relocation complete.
microcode: Update skipped, already up-to-date
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802e9c00, cpu = 1
In relocation handler: cpu 1
New SMBASE=0x802e9c00 IEDBASE=0x80400000
SMM revision: 0x00030101
Writing SMRR. base = 0x80000006, mask=0xff800800
Relocation complete.
microcode: Update skipped, already up-to-date
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802e9800, cpu = 2
In relocation handler: cpu 2
New SMBASE=0x802e9800 IEDBASE=0x80400000
SMM revision: 0x00030101
Writing SMRR. base = 0x80000006, mask=0xff800800
Relocation complete.
microcode: Update skipped, already up-to-date
smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802e9400, cpu = 3
In relocation handler: cpu 3
New SMBASE=0x802e9400 IEDBASE=0x80400000
SMM revision: 0x00030101
Writing SMRR. base = 0x80000006, mask=0xff800800
Relocation complete.
microcode: Update skipped, already up-to-date
Initializing CPU #0
CPU: vendor Intel device 306a9
CPU: family 06, model 3a, stepping 09
CPU: Intel(R) Core(TM) i7-3520M CPU @ 2.90GHz.
CPU: platform id 4
CPU: cpuid(1) 0x306a9
CPU: AES supported
CPU: TXT supported
CPU: VT supported
Setting up local APIC...
apic_id: 0x0 done.
IA32_FEATURE_CONTROL already locked; VMX status: enabled
IA32_FEATURE_CONTROL already locked
cpu: energy policy set to 6
model_x06ax: frequency set to 2900
Turbo is available but hidden
Turbo is available and visible
CPU #0 initialized
Initializing CPU #1
Initializing CPU #2
Initializing CPU #3
CPU: vendor Intel device 306a9
CPU: vendor Intel device 306a9
CPU: family 06, model 3a, stepping 09
CPU: family 06, model 3a, stepping 09
CPU: vendor Intel device 306a9
CPU: family 06, model 3a, stepping 09
CPU: Intel(R) Core(TM) i7-3520M CPU @ 2.90GHz.
CPU: platform id 4
CPU: Intel(R) Core(TM) i7-3520M CPU @ 2.90GHz.
CPU: cpuid(1) 0x306a9
CPU: platform id 4
CPU: AES supported
CPU: TXT supported
CPU: VT supported
CPU: cpuid(1) 0x306a9
Setting up local APIC...
CPU: AES supported
CPU: TXT supported
CPU: VT supported
CPU: Intel(R) Core(TM) i7-3520M CPU @ 2.90GHz.
apic_id: 0x3 done.
Setting up local APIC...
IA32_FEATURE_CONTROL already locked; CPU: platform id 4
VMX status: enabled
apic_id: 0x2 done.
IA32_FEATURE_CONTROL already locked
IA32_FEATURE_CONTROL already locked; VMX status: enabled
CPU: cpuid(1) 0x306a9
IA32_FEATURE_CONTROL already locked
CPU: AES supported
CPU: TXT supported
CPU: VT supported
Setting up local APIC...
apic_id: 0x1 done.
IA32_FEATURE_CONTROL already locked; VMX status: enabled
IA32_FEATURE_CONTROL already locked
cpu: energy policy set to 6
model_x06ax: frequency set to 2900
CPU #2 initialized
cpu: energy policy set to 6
model_x06ax: frequency set to 2900
CPU #3 initialized
cpu: energy policy set to 6
model_x06ax: frequency set to 2900
CPU #1 initialized
bsp_do_flight_plan done after 9 msecs.
Initializing southbridge SMI... ... pmbase = 0x0500
SMI_STS:
PM1_STS:
PM1_EN: 0
GPE0_STS: GPIO15 GPIO14 GPIO11 GPIO9 GPIO7 GPIO5 GPIO4 GPIO3 GPIO0
ALT_GP_SMI_STS: GPI14 GPI13 GPI11 GPI10 GPI9 GPI7 GPI6 GPI5 GPI4 GPI3 GPI1 GPI0
TCO_STS:
Locking SMM.
CPU_CLUSTER: 0 init finished in 23 msecs
PCI: 00:00.0 init
Disabling PEG12.
Disabling PEG11.
Disabling PEG10.
Disabling PEG60.
Disabling Device 7.
Disabling PEG IO clock.
Set BIOS_RESET_CPL
CPU TDP: 35 Watts
PCI: 00:00.0 init finished in 1 msecs
PCI: 00:02.0 init
CBFS: Found 'vbt.bin' @0x466c0 size 0x599 in mcache @0x7fffd21c
Found a VBT of 4281 bytes after decompression
GMA: Found VBT in CBFS
GMA: Found valid VBT in CBFS
GT Power Management Init
IVB GT2 25W-35W Power Meter Weights
GT Power Management Init (post VBIOS)
Initializing VGA without OPROM.
[0.685280] CONFIG =>
[0.685280] (Primary =>
[0.685281] (Port => LVDS ,
[0.685281] Framebuffer =>
[0.685282] (Width => 1024,
[0.685282] Height => 768,
[0.685283] Start_X => 0,
[0.685283] Start_Y => 0,
[0.685284] Stride => 1024,
[0.685284] V_Stride => 768,
[0.685285] Tiling => Linear ,
[0.685285] Rotation => No_Rotation,
[0.685286] Offset => 0x00000000,
[0.685286] BPC => 8),
[0.685287] Mode =>
[0.685287] (Dotclock => 75200000,
[0.685288] H_Visible => 1366,
[0.685288] H_Sync_Begin => 1414,
[0.685289] H_Sync_End => 1478,
[0.685289] H_Total => 1582,
[0.685290] V_Visible => 768,
[0.685290] V_Sync_Begin => 772,
[0.685291] V_Sync_End => 779,
[0.685291] V_Total => 792,
[0.685292] H_Sync_Active_High => True,
[0.685292] V_Sync_Active_High => False,
[0.685293] BPC => 5)),
[0.685293] Secondary =>
[0.685294] (Port => Disabled,
[0.685294] Framebuffer =>
[0.685294] (Width => 1,
[0.685295] Height => 1,
[0.685295] Start_X => 0,
[0.685296] Start_Y => 0,
[0.685296] Stride => 1,
[0.685297] V_Stride => 1,
[0.685297] Tiling => Linear ,
[0.685298] Rotation => No_Rotation,
[0.685298] Offset => 0x00000000,
[0.685299] BPC => 8),
[0.685299] Mode =>
[0.685299] (Dotclock => 1000000,
[0.685300] H_Visible => 1,
[0.685300] H_Sync_Begin => 1,
[0.685301] H_Sync_End => 1,
[0.685301] H_Total => 1,
[0.685302] V_Visible => 1,
[0.685302] V_Sync_Begin => 1,
[0.685303] V_Sync_End => 1,
[0.685303] V_Total => 1,
[0.685304] H_Sync_Active_High => False,
[0.685304] V_Sync_Active_High => False,
[0.685305] BPC => 5)),
[0.685305] Tertiary =>
[0.685306] (Port => Disabled,
[0.685306] Framebuffer =>
[0.685306] (Width => 1,
[0.685307] Height => 1,
[0.685307] Start_X => 0,
[0.685308] Start_Y => 0,
[0.685308] Stride => 1,
[0.685309] V_Stride => 1,
[0.685309] Tiling => Linear ,
[0.685310] Rotation => No_Rotation,
[0.685310] Offset => 0x00000000,
[0.685311] BPC => 8),
[0.685311] Mode =>
[0.685311] (Dotclock => 1000000,
[0.685312] H_Visible => 1,
[0.685312] H_Sync_Begin => 1,
[0.685313] H_Sync_End => 1,
[0.685313] H_Total => 1,
[0.685314] V_Visible => 1,
[0.685314] V_Sync_Begin => 1,
[0.685315] V_Sync_End => 1,
[0.685315] V_Total => 1,
[0.685316] H_Sync_Active_High => False,
[0.685316] V_Sync_Active_High => False,
[0.685317] BPC => 5)));
framebuffer_info: bytes_per_line: 4096, bits_per_pixel: 32
x_res x y_res: 1024 x 768, size: 3145728 at 0x90000000
PCI: 00:02.0 init finished in 515 msecs
PCI: 00:04.0 init
PCI: 00:04.0 init finished in 0 msecs
PCI: 00:14.0 init
XHCI: Setting up controller.. done.
PCI: 00:14.0 init finished in 0 msecs
PCI: 00:16.0 init
ME: FW Partition Table : OK
ME: Bringup Loader Failure : NO
ME: Firmware Init Complete : NO
ME: Manufacturing Mode : YES
ME: Boot Options Present : NO
ME: Update In Progress : NO
ME: Current Working State : Initializing
ME: Current Operation State : Bring up
ME: Current Operation Mode : Debug or Disabled by AltDisableBit
ME: Error Code : No Error
ME: Progress Phase : BUP Phase
ME: Power Management Event : Pseudo-global reset
ME: Progress Phase State : Check to see if straps say ME DISABLED
intel_me_path: mbp is not ready!
ME: BIOS path: Error
ME: me_state=0, me_state_prev=0
PCI: 00:16.0 init finished in 0 msecs
PCI: 00:19.0 init
PCI: 00:19.0 init finished in 0 msecs
PCI: 00:1a.0 init
EHCI: Setting up controller.. done.
PCI: 00:1a.0 init finished in 0 msecs
PCI: 00:1b.0 init
Azalia: base = 83838000
Azalia: codec_mask = 09
Azalia: Initializing codec #3
Azalia: codec viddid: 80862806
Azalia: verb_size: 16
Azalia: verb loaded.
Azalia: Initializing codec #0
Azalia: codec viddid: 10ec0269
Azalia: verb_size: 76
Azalia: verb loaded.
PCI: 00:1b.0 init finished in 5 msecs
PCI: 00:1c.0 init
Initializing PCH PCIe bridge.
PCI: 00:1c.0 init finished in 0 msecs
PCI: 00:1c.1 init
Initializing PCH PCIe bridge.
PCI: 00:1c.1 init finished in 0 msecs
PCI: 00:1c.2 init
Initializing PCH PCIe bridge.
PCI: 00:1c.2 init finished in 0 msecs
PCI: 00:1d.0 init
EHCI: Setting up controller.. done.
PCI: 00:1d.0 init finished in 0 msecs
PCI: 00:1f.0 init
pch: lpc_init
PCH: detected QM77, device id: 0x1e55, rev id 0x4
IOAPIC: Initializing IOAPIC at 0xfec00000
IOAPIC: Bootstrap Processor Local APIC = 0x00
IOAPIC: ID = 0x02
IOAPIC: Dumping registers
reg 0x0000: 0x02000000
reg 0x0001: 0x00170020
reg 0x0002: 0x00170020
Set power off after power failure.
NMI sources enabled.
PantherPoint PM init
RTC: failed = 0x0
RTC Init
apm_control: Disabling ACPI.
APMC done.
pch_spi_init
PCI: 00:1f.0 init finished in 0 msecs
PCI: 00:1f.2 init
SATA: Initializing...
SATA: Controller in AHCI mode.
ABAR: 0x8383e000
PCI: 00:1f.2 init finished in 0 msecs
PCI: 00:1f.3 init
PCI: 00:1f.3 init finished in 0 msecs
PCI: 00:1f.6 init
PCI: 00:1f.6 init finished in 0 msecs
PCI: 01:00.0 init
PCI: 01:00.0 init finished in 0 msecs
PCI: 02:00.0 init
PCI: 02:00.0 init finished in 0 msecs
PNP: 00ff.2 init
PNP: 00ff.2 init finished in 0 msecs
smbus: PCI: 00:1f.3[0]->I2C: 01:54 init
I2C: 01:54 init finished in 0 msecs
smbus: PCI: 00:1f.3[0]->I2C: 01:55 init
I2C: 01:55 init finished in 0 msecs
smbus: PCI: 00:1f.3[0]->I2C: 01:56 init
I2C: 01:56 init finished in 0 msecs
smbus: PCI: 00:1f.3[0]->I2C: 01:57 init
I2C: 01:57 init finished in 0 msecs
smbus: PCI: 00:1f.3[0]->I2C: 01:5c init
Locking EEPROM RFID
init EEPROM done
I2C: 01:5c init finished in 26 msecs
smbus: PCI: 00:1f.3[0]->I2C: 01:5d init
I2C: 01:5d init finished in 0 msecs
smbus: PCI: 00:1f.3[0]->I2C: 01:5e init
I2C: 01:5e init finished in 0 msecs
smbus: PCI: 00:1f.3[0]->I2C: 01:5f init
I2C: 01:5f init finished in 0 msecs
Devices initialized
Show all devs... After init.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
DOMAIN: 0000: enabled 1
APIC: 00: enabled 1
APIC: acac: enabled 0
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 0
PCI: 00:02.0: enabled 1
PCI: 00:14.0: enabled 1
PCI: 00:16.0: enabled 1
PCI: 00:16.1: enabled 0
PCI: 00:16.2: enabled 0
PCI: 00:16.3: enabled 0
PCI: 00:19.0: enabled 1
PCI: 00:1a.0: enabled 1
PCI: 00:1b.0: enabled 1
PCI: 00:1c.0: enabled 1
PCI: 00:1c.1: enabled 1
PCI: 00:1c.2: enabled 1
PCI: 00:1c.3: enabled 0
PCI: 00:1c.4: enabled 0
PCI: 00:1c.5: enabled 0
PCI: 00:1c.6: enabled 0
PCI: 00:1c.7: enabled 0
PCI: 00:1d.0: enabled 1
PCI: 00:1e.0: enabled 0
PCI: 00:1f.0: enabled 1
PCI: 00:1f.2: enabled 1
PCI: 00:1f.3: enabled 1
PCI: 00:1f.5: enabled 0
PCI: 00:1f.6: enabled 1
PCI: 01:00.0: enabled 1
PNP: 00ff.1: enabled 1
PNP: 0c31.0: enabled 1
PNP: 00ff.2: enabled 1
I2C: 01:54: enabled 1
I2C: 01:55: enabled 1
I2C: 01:56: enabled 1
I2C: 01:57: enabled 1
I2C: 01:5c: enabled 1
I2C: 01:5d: enabled 1
I2C: 01:5e: enabled 1
I2C: 01:5f: enabled 1
PCI: 00:04.0: enabled 1
PCI: 02:00.0: enabled 1
NONE: enabled 1
APIC: 01: enabled 1
APIC: 03: enabled 1
APIC: 02: enabled 1
BS: BS_DEV_INIT run times (exec / console): 574 / 1 ms
Finalize devices...
PCI: 00:1f.0 final
flash size 0xc00000 bytes
SF: Detected 00 0000 with sector size 0x1000, total 0xc00000
apm_control: Finalizing SMM.
APMC done.
Devices finalized
CBFS: Found 'fallback/dsdt.aml' @0x42d80 size 0x38fd in mcache @0x7fffd1f0
CBFS: 'fallback/slic' not found.
ACPI: Writing ACPI tables at 7ff3a000.
ACPI: * FACS
ACPI: * DSDT
ACPI: * FADT
ACPI: added table 1/32, length now 40
ACPI: * SSDT
Found 1 CPU(s) with 4 core(s) each.
PSS: 2901MHz power 35000 control 0x2400 status 0x2400
PSS: 2900MHz power 35000 control 0x1d00 status 0x1d00
PSS: 2400MHz power 27295 control 0x1800 status 0x1800
PSS: 2000MHz power 21703 control 0x1400 status 0x1400
PSS: 1600MHz power 16527 control 0x1000 status 0x1000
PSS: 1200MHz power 11795 control 0xc00 status 0xc00
PSS: 2901MHz power 35000 control 0x2400 status 0x2400
PSS: 2900MHz power 35000 control 0x1d00 status 0x1d00
PSS: 2400MHz power 27295 control 0x1800 status 0x1800
PSS: 2000MHz power 21703 control 0x1400 status 0x1400
PSS: 1600MHz power 16527 control 0x1000 status 0x1000
PSS: 1200MHz power 11795 control 0xc00 status 0xc00
PSS: 2901MHz power 35000 control 0x2400 status 0x2400
PSS: 2900MHz power 35000 control 0x1d00 status 0x1d00
PSS: 2400MHz power 27295 control 0x1800 status 0x1800
PSS: 2000MHz power 21703 control 0x1400 status 0x1400
PSS: 1600MHz power 16527 control 0x1000 status 0x1000
PSS: 1200MHz power 11795 control 0xc00 status 0xc00
PSS: 2901MHz power 35000 control 0x2400 status 0x2400
PSS: 2900MHz power 35000 control 0x1d00 status 0x1d00
PSS: 2400MHz power 27295 control 0x1800 status 0x1800
PSS: 2000MHz power 21703 control 0x1400 status 0x1400
PSS: 1600MHz power 16527 control 0x1000 status 0x1000
PSS: 1200MHz power 11795 control 0xc00 status 0xc00
Generating ACPI PIRQ entries
ACPI_PIRQ_GEN: PCI: 00:02.0: pin=0 pirq=0
ACPI_PIRQ_GEN: PCI: 00:04.0: pin=0 pirq=0
ACPI_PIRQ_GEN: PCI: 00:14.0: pin=0 pirq=1
ACPI_PIRQ_GEN: PCI: 00:16.0: pin=0 pirq=0
ACPI_PIRQ_GEN: PCI: 00:19.0: pin=0 pirq=1
ACPI_PIRQ_GEN: PCI: 00:1a.0: pin=0 pirq=3
ACPI_PIRQ_GEN: PCI: 00:1b.0: pin=0 pirq=3
ACPI_PIRQ_GEN: PCI: 00:1c.0: pin=0 pirq=0
ACPI_PIRQ_GEN: PCI: 00:1c.1: pin=1 pirq=1
ACPI_PIRQ_GEN: PCI: 00:1c.2: pin=2 pirq=2
ACPI_PIRQ_GEN: PCI: 00:1d.0: pin=0 pirq=2
ACPI_PIRQ_GEN: PCI: 00:1f.2: pin=0 pirq=0
ACPI_PIRQ_GEN: PCI: 00:1f.3: pin=1 pirq=0
ACPI_PIRQ_GEN: PCI: 00:1f.6: pin=3 pirq=1
\_SB.PCI0.LPCB.TPM.TPM: LPC TPM PNP: 0c31.0
ACPI: * H8
H8: BDC detection not implemented. Assuming BDC installed
H8: WWAN not installed
ACPI: added table 2/32, length now 44
ACPI: * MCFG
ACPI: added table 3/32, length now 48
ACPI: * TCPA
TCPA log created at 0x7ff2a000
ACPI: added table 4/32, length now 52
ACPI: * MADT
ACPI: added table 5/32, length now 56
current = 7ff3f570
ACPI: * DMAR
ACPI: added table 6/32, length now 60
current = 7ff3f630
ACPI: * HPET
ACPI: added table 7/32, length now 64
ACPI: done.
ACPI tables: 22128 bytes.
smbios_write_tables: 7ff29000
recv_ec_data: 0x47
recv_ec_data: 0x32
recv_ec_data: 0x48
recv_ec_data: 0x54
recv_ec_data: 0x33
recv_ec_data: 0x35
recv_ec_data: 0x57
recv_ec_data: 0x57
recv_ec_data: 0x16
recv_ec_data: 0x03
Create SMBIOS type 16
Create SMBIOS type 17
SMBIOS tables: 1047 bytes.
Writing table forward entry at 0x00000500
Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 9fe8
Writing coreboot table at 0x7ff5e000
CBFS: Found 'cmos_layout.bin' @0x46e00 size 0x7dc in mcache @0x7fffd274
0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1. 0000000000001000-000000000009ffff: RAM
2. 00000000000a0000-00000000000fffff: RESERVED
3. 0000000000100000-000000007ff28fff: RAM
4. 000000007ff29000-000000007ff78fff: CONFIGURATION TABLES
5. 000000007ff79000-000000007ffd0fff: RAMSTAGE
6. 000000007ffd1000-000000007fffffff: CONFIGURATION TABLES
7. 0000000080000000-00000000829fffff: RESERVED
8. 00000000f0000000-00000000f3ffffff: RESERVED
9. 00000000fed40000-00000000fed44fff: RESERVED
10. 00000000fed90000-00000000fed91fff: RESERVED
11. 0000000100000000-000000047d5fffff: RAM
Setting up bootsplash in 1024x768@32
CBFS: Found 'bootsplash.jpg' @0x3f340 size 0x39f8 in mcache @0x7fffd1c8
Bootsplash image resolution: 1024x768
Bootsplash loaded
Wrote coreboot table at: 0x7ff5e000, 0xbcc bytes, checksum 6e74
coreboot table: 3044 bytes.
IMD ROOT 0. 0x7ffff000 0x00001000
IMD SMALL 1. 0x7fffe000 0x00001000
RO MCACHE 2. 0x7fffd000 0x00000424
CONSOLE 3. 0x7ffdd000 0x00020000
TIME STAMP 4. 0x7ffdc000 0x00000910
ROMSTG STCK 5. 0x7ffdb000 0x00001000
AFTER CAR 6. 0x7ffd1000 0x0000a000
RAMSTAGE 7. 0x7ff78000 0x00059000
SMM BACKUP 8. 0x7ff68000 0x00010000
4f444749 9. 0x7ff66000 0x00002000
COREBOOT 10. 0x7ff5e000 0x00008000
ACPI 11. 0x7ff3a000 0x00024000
TCPA TCGLOG12. 0x7ff2a000 0x00010000
SMBIOS 13. 0x7ff29000 0x00000800
IMD small region:
IMD ROOT 0. 0x7fffec00 0x00000400
FMAP 1. 0x7fffeb20 0x000000e0
MEM INFO 2. 0x7fffe940 0x000001e0
ROMSTAGE 3. 0x7fffe920 0x00000004
ACPI GNVS 4. 0x7fffe820 0x00000100
BS: BS_WRITE_TABLES run times (exec / console): 43 / 0 ms
CBFS: Found 'fallback/payload' @0x6b000 size 0x10e4d in mcache @0x7fffd330
Checking segment from ROM address 0xffc7b22c
Payload being loaded at below 1MiB without region being marked as RAM usable.
Checking segment from ROM address 0xffc7b248
Loading segment from ROM address 0xffc7b22c
code (compression=1)
New segment dstaddr 0x000dffa0 memsize 0x20060 srcaddr 0xffc7b264 filesize 0x10e15
Loading Segment: addr: 0x000dffa0 memsz: 0x0000000000020060 filesz: 0x0000000000010e15
using LZMA
[ 0x000dffa0, 00100000, 0x00100000) <- ffc7b264
Loading segment from ROM address 0xffc7b248
Entry Point 0x000fd265
Loaded segments
BS: BS_PAYLOAD_LOAD run times (exec / console): 21 / 0 ms
ICH-NM10-PCH: watchdog disabled
Jumping to boot code at 0x000fd265(0x7ff5e000)
CPU0: stack: 0x7ffbf000 - 0x7ffc0000, lowest used address 0x7ffbf89c, stack used: 1892 bytes
SeaBIOS (version rel-1.14.0-0-g155821a)
BUILD: gcc: (coreboot toolchain v2021-04-06_7014f8258e) 8.3.0 binutils: (GNU Binutils) 2.35.1
Found coreboot cbmem console @ 7ffdd000
Found mainboard LENOVO ThinkPad X230
Relocating init from 0x000e16c0 to 0x7fedbc60 (size 54016)
Found CBFS header at 0xffc1022c
multiboot: eax=7ffb5ca8, ebx=7ffb5c24
Found 18 PCI devices (max PCI bus is 03)
Copying SMBIOS entry point from 0x7ff29000 to 0x000f6780
Copying ACPI RSDP from 0x7ff3a000 to 0x000f6750
table(50434146)=0x7ff3dba0 (via xsdt)
Using pmtimer, ioport 0x508
table(41504354)=0x7ff3f4c0 (via xsdt)
Scan for VGA option rom
Running option rom at c000:0003
pmm call arg1=0
Turning on vga text mode console
SeaBIOS (version rel-1.14.0-0-g155821a)
Machine UUID 1d945c01-5165-11cb-9ffc-8fd632be452d
XHCI init on dev 00:14.0: regs @ 0x83820000, 8 ports, 32 slots, 32 byte contexts
XHCI protocol USB 2.00, 4 ports (offset 1), def 3001
XHCI protocol USB 3.00, 4 ports (offset 5), def 1000
XHCI extcap 0xc1 @ 0x83828040
XHCI extcap 0xc0 @ 0x83828070
XHCI extcap 0x1 @ 0x83828330
EHCI init on dev 00:1a.0 (regs=0x8383f020)
EHCI init on dev 00:1d.0 (regs=0x83840020)
AHCI controller at 00:1f.2, iobase 0x8383e000, irq 11
Searching bootorder for: /pci@i0cf8/pci-bridge@1c/*@0
Searching bootorder for: HALT
Found 0 lpt ports
Found 0 serial ports
Searching bootorder for: /rom@img/nvramcui
Searching bootorder for: /rom@img/coreinfo
Searching bootorder for: /pci@i0cf8/*@1f,2/drive@2/disk@0
AHCI/2: Set transfer mode to UDMA-6
Searching bios-geometry for: /pci@i0cf8/*@1f,2/drive@2/disk@0
AHCI/2: registering: "AHCI/2: KINGSTON SUV500MS480G ATA-11 Hard-Disk (447 GiBytes)"
XHCI no devices found
Initialized USB HUB (0 ports used)
Initialized USB HUB (0 ports used)
Initialized USB HUB (0 ports used)
PS2 keyboard initialized
All threads complete.
Scan for option roms
Press ESC for boot menu.
Turning on vga text mode console
SeaBIOS (version rel-1.14.0-0-g155821a)
Machine UUID 1d945c01-5165-11cb-9ffc-8fd632be452d
Select boot device:
1. AHCI/2: KINGSTON SUV500MS480G ATA-11 Hard-Disk (447 GiBytes)
2. Payload [nvramcui]
3. Payload [coreinfo]
t. TPM Configuration
Searching bootorder for: HALT
drive 0x000f66e0: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=937703088
Space available for UMB: c7000-ed000, f5fa0-f66e0
Returned 188416 bytes of ZoneHigh
e820 map has 9 items:
0: 0000000000000000 - 000000000009fc00 = 1 RAM
1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
3: 0000000000100000 - 000000007ff17000 = 1 RAM
4: 000000007ff17000 - 0000000082a00000 = 2 RESERVED
5: 00000000f0000000 - 00000000f4000000 = 2 RESERVED
6: 00000000fed40000 - 00000000fed45000 = 2 RESERVED
7: 00000000fed90000 - 00000000fed92000 = 2 RESERVED
8: 0000000100000000 - 000000047d600000 = 1 RAM
enter handle_19:
NULL
Booting from Hard Disk...
Booting from 0000:7c00