| |
| coreboot-4.14-564-ga5061f8f57 Tue Jun 15 19:46:47 UTC 2021 bootblock starting (log level: 7)... |
| FMAP: Found "FLASH" version 1.1 at 0x850000. |
| FMAP: base = 0xff400000 size = 0xc00000 #areas = 5 |
| FMAP: area COREBOOT found @ 850200 (3866112 bytes) |
| CBFS: mcache @0xff7c2e00 built for 16 files, used 0x368 of 0x4000 bytes |
| CBFS: 'coreboot-stages' not found. |
| CBFS: Found 'fallback/romstage' @0x80 size 0x8c08 in mcache @0xff7c2e2c |
| BS: bootblock times (exec / console): total (unknown) / 0 ms |
| |
| |
| coreboot-4.14-564-ga5061f8f57 Tue Jun 15 19:46:47 UTC 2021 romstage starting (log level: 7)... |
| Disabling Watchdog reboot... done. |
| SMBus controller enabled |
| Setting up static northbridge registers... done. |
| Started PEG10 link training. |
| Temporarily hiding PEG10. |
| Initializing IGD... |
| Back from haswell_early_initialization() |
| CPU id(306c3) ucode:00000028 Intel(R) Core(TM) i7-4800MQ CPU @ 2.70GHz |
| AES supported, TXT supported, VT supported |
| PCH type: QM87, device id: 8c4f, rev id 5 |
| Starting UEFI PEI System Agent |
| FMAP: area RW_MRC_CACHE found @ 800000 (65536 bytes) |
| MRC: no data in 'RW_MRC_CACHE' |
| CBFS: Found 'mrc.bin' @0x34fdc0 size 0x2e6e4 in mcache @0xff7c30e4 |
| System Agent: Starting up... |
| System Agent: Initializing PCH |
| install_ppi: overwrite GUID {ed097352-9041-445a-80b6-b29d509e8845} |
| install_ppi: overwrite GUID {908c7f8b-5c48-47fb-8357-f5fd4e235276} |
| System Agent: Initializing PCH (SMBUS) |
| System Agent: Initializing PCH (USB) |
| System Agent: Initializing PCH (SA Init) |
| System Agent: Initializing PCH (Me UMA) |
| System Agent: Initializing Memory |
| System Agent: Done. |
| Sanity checking heap. |
| MRC Version 1.6.1 Build 2 |
| memcfg DDR3 clock 1600 MHz |
| memcfg channel assignment: A: 0, B 1, C 2 |
| memcfg channel[0] config (00630020): |
| ECC inactive |
| enhanced interleave mode on |
| rank interleave on |
| DIMMA 8192 MB width x8 or x32 dual rank |
| DIMMB 0 MB width x8 or x32 single rank, selected |
| memcfg channel[1] config (00620020): |
| ECC inactive |
| enhanced interleave mode on |
| rank interleave on |
| DIMMA 8192 MB width x8 or x32 dual rank, selected |
| DIMMB 0 MB width x8 or x32 single rank |
| ME: FW Partition Table : OK |
| ME: Bringup Loader Failure : NO |
| ME: Firmware Init Complete : NO |
| ME: Manufacturing Mode : YES |
| ME: Boot Options Present : NO |
| ME: Update In Progress : NO |
| ME: Current Working State : Initializing |
| ME: Current Operation State : Bring up |
| ME: Current Operation Mode : Debug |
| ME: Error Code : No Error |
| ME: Progress Phase : BUP Phase |
| ME: Power Management Event : Pseudo-global reset |
| ME: Progress Phase State : 0x4d |
| CBMEM: |
| IMD: root @ 0x7f7ff000 254 entries. |
| IMD: root @ 0x7f7fec00 62 entries. |
| External stage cache: |
| IMD: root @ 0x7fbff000 254 entries. |
| IMD: root @ 0x7fbfec00 62 entries. |
| Unhiding PEG10. |
| SMM Memory Map |
| SMRAM : 0x7f800000 0x800000 |
| Subregion 0: 0x7f800000 0x300000 |
| Subregion 1: 0x7fb00000 0x100000 |
| Subregion 2: 0x7fc00000 0x400000 |
| MTRR Range: Start=7f000000 End=80000000 (Size 1000000) |
| MTRR Range: Start=ff800000 End=0 (Size 800000) |
| Normal boot |
| CBFS: Found 'fallback/postcar' @0x36200 size 0x5040 in mcache @0xff7c3074 |
| Loading module at 0x7f7d0000 with entry 0x7f7d0031. filesize: 0x4cd0 memsize: 0x8fd8 |
| Processing 204 relocs. Offset value of 0x7d7d0000 |
| BS: romstage times (exec / console): total (unknown) / 1 ms |
| |
| |
| coreboot-4.14-564-ga5061f8f57 Tue Jun 15 19:46:47 UTC 2021 postcar starting (log level: 7)... |
| Normal boot |
| CBFS: Found 'fallback/ramstage' @0x14200 size 0x1d6ae in mcache @0x7f7dd10c |
| Loading module at 0x7f77e000 with entry 0x7f77e000. filesize: 0x3b8a0 memsize: 0x50d70 |
| Processing 3935 relocs. Offset value of 0x7e97e000 |
| BS: postcar times (exec / console): total (unknown) / 0 ms |
| |
| |
| coreboot-4.14-564-ga5061f8f57 Tue Jun 15 19:46:47 UTC 2021 ramstage starting (log level: 7)... |
| Normal boot |
| Enumerating buses... |
| Root Device scanning... |
| CPU_CLUSTER: 0 enabled |
| DOMAIN: 0000 enabled |
| DOMAIN: 0000 scanning... |
| PCI: pci_scan_bus for bus 00 |
| PCI: 00:00.0 [8086/0c04] enabled |
| PCI: 00:01.0 [8086/0c01] enabled |
| PCI: 00:02.0 [8086/0416] enabled |
| PCI: 00:03.0 [8086/0c0c] enabled |
| PCI: 00:04.0 [8086/0c03] enabled |
| PCI: 00:14.0 [8086/8c31] enabled |
| PCI: 00:16.0 [8086/8c3a] enabled |
| PCI: 00:16.1: Disabling device |
| PCI: 00:16.2: Disabling device |
| PCI: Static device PCI: 00:16.3 not found, disabling it. |
| PCI: 00:19.0 [8086/153a] enabled |
| PCI: 00:1a.0 [8086/8c2d] enabled |
| PCI: 00:1b.0 [8086/8c20] enabled |
| PCIe Root Port 1 ASPM is disabled |
| PCI: 00:1c.0 [8086/8c10] enabled |
| PCIe Root Port 2 ASPM is disabled |
| PCI: 00:1c.1 [8086/8c12] enabled |
| PCIe Root Port 3 ASPM is disabled |
| PCI: 00:1c.2 [8086/8c14] enabled |
| PCI: 00:1c.3 [8086/8c16] disabled |
| Adjusted number of PCIe root ports to 5 as per strpfusecfg2 |
| PCIe Root Port 5 ASPM is disabled |
| PCI: 00:1c.3: Disabling device |
| PCI: 00:1c.4 [8086/8c18] enabled |
| PCI: 00:1d.0 [8086/8c26] enabled |
| PCI: 00:1f.0 [8086/8c4f] enabled |
| PCI: 00:1f.2 [8086/8c03] enabled |
| PCI: 00:1f.3 [8086/8c22] enabled |
| PCI: 00:1f.5: Disabling device |
| PCI: 00:1f.6: Disabling device |
| PCI: Leftover static devices: |
| PCI: 00:16.1 |
| PCI: 00:16.2 |
| PCI: 00:16.3 |
| PCI: 00:1f.5 |
| PCI: 00:1f.6 |
| PCI: Check your devicetree.cb. |
| PCI: 00:01.0 scanning... |
| PCI: pci_scan_bus for bus 01 |
| PCI: 01:00.0 [10de/11fc] enabled |
| PCI: 01:00.1 [10de/0e0b] enabled |
| Enabling Common Clock Configuration |
| ASPM: Enabled L0s and L1 |
| PCIe: Max_Payload_Size adjusted to 256 |
| PCI: 01:00.0: No LTR support |
| Enabling Common Clock Configuration |
| ASPM: Enabled L0s and L1 |
| PCIe: Max_Payload_Size adjusted to 256 |
| PCI: 01:00.1: No LTR support |
| scan_bus: bus PCI: 00:01.0 finished in 0 msecs |
| PCI: 00:1c.0 scanning... |
| PCI: pci_scan_bus for bus 02 |
| PCI: 02:00.0 [1217/8520] enabled |
| ASPM: Enabled L0s and L1 |
| PCIe: Max_Payload_Size adjusted to 128 |
| PCI: 02:00.0: Enabled LTR |
| scan_bus: bus PCI: 00:1c.0 finished in 0 msecs |
| PCI: 00:1c.1 scanning... |
| PCI: pci_scan_bus for bus 03 |
| PCI: 03:00.0 [8086/2723] enabled |
| Enabling Common Clock Configuration |
| ASPM: Enabled L1 |
| PCIe: Max_Payload_Size adjusted to 128 |
| PCI: 03:00.0: Enabled LTR |
| scan_bus: bus PCI: 00:1c.1 finished in 0 msecs |
| PCI: 00:1c.2 scanning... |
| PCI: pci_scan_bus for bus 04 |
| scan_bus: bus PCI: 00:1c.2 finished in 0 msecs |
| PCI: 00:1c.4 scanning... |
| PCI: pci_scan_bus for bus 05 |
| scan_bus: bus PCI: 00:1c.4 finished in 0 msecs |
| PCI: 00:1f.0 scanning... |
| No CMOS option 'touchpad'. |
| PMH7: ID 05 Revision 01 |
| PNP: 00ff.1 enabled |
| H8: EC Firmware ID GMHT25WW-3.23, Version 0.01B |
| No CMOS option 'bluetooth'. |
| H8: WWAN detection not implemented. Assuming WWAN installed |
| No CMOS option 'wwan'. |
| No CMOS option 'first_battery'. |
| PNP: 00ff.2 enabled |
| PNP: 0c31.0 enabled |
| scan_bus: bus PCI: 00:1f.0 finished in 4 msecs |
| PCI: 00:1f.3 scanning... |
| scan_bus: bus PCI: 00:1f.3 finished in 0 msecs |
| scan_bus: bus DOMAIN: 0000 finished in 5 msecs |
| scan_bus: bus Root Device finished in 5 msecs |
| done |
| BS: BS_DEV_ENUMERATE run times (exec / console): 6 / 0 ms |
| FMAP: area RW_MRC_CACHE found @ 800000 (65536 bytes) |
| FMAP: area RW_MRC_CACHE found @ 800000 (65536 bytes) |
| MRC: Checking cached data update for 'RW_MRC_CACHE'. |
| flash size 0x2800000 bytes |
| SF: Detected 00 0000 with sector size 0x1000, total 0x2800000 |
| SF size 0x2800000 does not correspond to CONFIG_ROM_SIZE 0xc00000!! |
| MRC: no data in 'RW_MRC_CACHE' |
| MRC: cache data 'RW_MRC_CACHE' needs update. |
| SF: Successfully written 2 bytes @ 0x800000 |
| SF: Successfully written 2 bytes @ 0x800002 |
| SF: Successfully written 16 bytes @ 0x800020 |
| SF: Successfully written 4052 bytes @ 0x800030 |
| MRC: updated 'RW_MRC_CACHE'. |
| BS: BS_DEV_ENUMERATE exit times (exec / console): 11 / 0 ms |
| found VGA at PCI: 00:02.0 |
| found VGA at PCI: 01:00.0 |
| Setting up VGA for PCI: 01:00.0 |
| Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:01.0 |
| Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 |
| Setting PCI_BRIDGE_CTL_VGA for bridge Root Device |
| Allocating resources... |
| Reading resources... |
| mc_add_fixed_mmio_resources: Adding MCHBAR @ 48 0xfed10000-0xfed17fff. |
| mc_add_fixed_mmio_resources: Adding DMIBAR @ 68 0xfed18000-0xfed18fff. |
| mc_add_fixed_mmio_resources: Adding EPBAR @ 40 0xfed19000-0xfed19fff. |
| mc_add_fixed_mmio_resources: Adding GDXCBAR @ 5420 0xfed84000-0xfed84fff. |
| Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000. |
| MC MAP: TOM: 0x400000000 |
| MC MAP: TOUUD: 0x47de00000 |
| MC MAP: MESEG_BASE: 0x7ffff00000 |
| MC MAP: MESEG_LIMIT: 0xfffff |
| MC MAP: REMAP_BASE: 0x400000000 |
| MC MAP: REMAP_LIMIT: 0x47ddfffff |
| MC MAP: TOLUD: 0x82200000 |
| MC MAP: BGSM: 0x80000000 |
| MC MAP: BDSM: 0x80200000 |
| MC MAP: TSEGMB: 0x7f800000 |
| MC MAP: GGC: 0x209 |
| MC MAP: DPR: 0x7f800001 |
| PNP: 00ff.1 missing read_resources |
| PNP: 00ff.2 missing read_resources |
| Done reading resources. |
| ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) === |
| PCI: 00:01.0 io: size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 01:00.0 24 * [0x0 - 0x7f] io |
| PCI: 00:01.0 io: size: 1000 align: 12 gran: 12 limit: ffff done |
| PCI: 00:01.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 01:00.0 10 * [0x0 - 0xffffff] mem |
| PCI: 01:00.0 30 * [0x1000000 - 0x107ffff] mem |
| PCI: 01:00.1 10 * [0x1080000 - 0x1083fff] mem |
| PCI: 00:01.0 mem: size: 1100000 align: 24 gran: 20 limit: ffffffff done |
| PCI: 00:01.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 01:00.0 14 * [0x0 - 0xfffffff] prefmem |
| PCI: 01:00.0 1c * [0x10000000 - 0x11ffffff] prefmem |
| PCI: 00:01.0 prefmem: size: 12000000 align: 28 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 02:00.0 10 * [0x0 - 0xfff] mem |
| PCI: 02:00.0 14 * [0x1000 - 0x17ff] mem |
| PCI: 00:1c.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| PCI: 00:1c.1 io: size: 0 align: 12 gran: 12 limit: ffff |
| PCI: 00:1c.1 io: size: 0 align: 12 gran: 12 limit: ffff done |
| PCI: 00:1c.1 mem: size: 0 align: 20 gran: 20 limit: ffffffff |
| PCI: 03:00.0 10 * [0x0 - 0x3fff] mem |
| PCI: 00:1c.1 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done |
| PCI: 00:1c.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff |
| PCI: 00:1c.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done |
| === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) === |
| DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff |
| update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed) |
| update_constraints: PCI: 00:1f.0 84 base 00001600 limit 0000167f io (fixed) |
| update_constraints: PCI: 00:1f.0 88 base 000015e0 limit 000015ef io (fixed) |
| update_constraints: PNP: 00ff.1 77 base 000015e0 limit 000015ef io (fixed) |
| update_constraints: PCI: 00:1f.3 20 base 00000400 limit 0000041f io (fixed) |
| DOMAIN: 0000: Resource ranges: |
| * Base: 1000, Size: 5e0, Tag: 100 |
| * Base: 15f0, Size: 10, Tag: 100 |
| * Base: 1680, Size: e980, Tag: 100 |
| PCI: 00:01.0 1c * [0x2000 - 0x2fff] limit: 2fff io |
| PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io |
| PCI: 00:19.0 18 * [0x1040 - 0x105f] limit: 105f io |
| PCI: 00:1f.2 20 * [0x1060 - 0x107f] limit: 107f io |
| PCI: 00:1f.2 10 * [0x1080 - 0x1087] limit: 1087 io |
| PCI: 00:1f.2 18 * [0x1088 - 0x108f] limit: 108f io |
| PCI: 00:1f.2 14 * [0x1090 - 0x1093] limit: 1093 io |
| PCI: 00:1f.2 1c * [0x1094 - 0x1097] limit: 1097 io |
| DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done |
| DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff |
| update_constraints: PCI: 00:00.0 48 base fed10000 limit fed17fff mem (fixed) |
| update_constraints: PCI: 00:00.0 68 base fed18000 limit fed18fff mem (fixed) |
| update_constraints: PCI: 00:00.0 40 base fed19000 limit fed19fff mem (fixed) |
| update_constraints: PCI: 00:00.0 5420 base fed84000 limit fed84fff mem (fixed) |
| update_constraints: PCI: 00:00.0 60 base f0000000 limit f3ffffff mem (fixed) |
| update_constraints: PCI: 00:00.0 00 base fed90000 limit fed90fff mem (fixed) |
| update_constraints: PCI: 00:00.0 01 base fed91000 limit fed91fff mem (fixed) |
| update_constraints: PCI: 00:00.0 02 base 00000000 limit 0009ffff mem (fixed) |
| update_constraints: PCI: 00:00.0 03 base 000c0000 limit 7f7fffff mem (fixed) |
| update_constraints: PCI: 00:00.0 04 base 7f800000 limit 7fffffff mem (fixed) |
| update_constraints: PCI: 00:00.0 05 base 80000000 limit 821fffff mem (fixed) |
| update_constraints: PCI: 00:00.0 06 base 100000000 limit 47ddfffff mem (fixed) |
| update_constraints: PCI: 00:00.0 07 base 000a0000 limit 000bffff mem (fixed) |
| update_constraints: PCI: 00:00.0 08 base 000c0000 limit 000fffff mem (fixed) |
| update_constraints: PCI: 00:1f.0 31fe base fec00000 limit ffffffff mem (fixed) |
| update_constraints: PNP: 0c31.0 00 base fed40000 limit fed44fff mem (fixed) |
| DOMAIN: 0000: Resource ranges: |
| * Base: 82200000, Size: 6de00000, Tag: 200 |
| * Base: f4000000, Size: ac00000, Tag: 200 |
| * Base: 47de00000, Size: 7b82200000, Tag: 100200 |
| PCI: 00:01.0 24 * [0x90000000 - 0xa1ffffff] limit: a1ffffff prefmem |
| PCI: 00:02.0 18 * [0xb0000000 - 0xbfffffff] limit: bfffffff prefmem |
| PCI: 00:01.0 20 * [0x83000000 - 0x840fffff] limit: 840fffff mem |
| PCI: 00:02.0 10 * [0x82400000 - 0x827fffff] limit: 827fffff mem |
| PCI: 00:1c.0 20 * [0x82200000 - 0x822fffff] limit: 822fffff mem |
| PCI: 00:1c.1 20 * [0x82300000 - 0x823fffff] limit: 823fffff mem |
| PCI: 00:19.0 10 * [0x82800000 - 0x8281ffff] limit: 8281ffff mem |
| PCI: 00:14.0 10 * [0x82820000 - 0x8282ffff] limit: 8282ffff mem |
| PCI: 00:04.0 10 * [0x82830000 - 0x82837fff] limit: 82837fff mem |
| PCI: 00:03.0 10 * [0x82838000 - 0x8283bfff] limit: 8283bfff mem |
| PCI: 00:1b.0 10 * [0x8283c000 - 0x8283ffff] limit: 8283ffff mem |
| PCI: 00:19.0 14 * [0x82840000 - 0x82840fff] limit: 82840fff mem |
| PCI: 00:1f.2 24 * [0x82841000 - 0x828417ff] limit: 828417ff mem |
| PCI: 00:1a.0 10 * [0x82842000 - 0x828423ff] limit: 828423ff mem |
| PCI: 00:1d.0 10 * [0x82843000 - 0x828433ff] limit: 828433ff mem |
| PCI: 00:1f.3 10 * [0x82844000 - 0x828440ff] limit: 828440ff mem |
| PCI: 00:16.0 10 * [0x82845000 - 0x8284500f] limit: 8284500f mem |
| DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done |
| PCI: 00:01.0 io: base: 2000 size: 1000 align: 12 gran: 12 limit: 2fff |
| PCI: 00:01.0: Resource ranges: |
| * Base: 2000, Size: 1000, Tag: 100 |
| PCI: 01:00.0 24 * [0x2000 - 0x207f] limit: 207f io |
| PCI: 00:01.0 io: base: 2000 size: 1000 align: 12 gran: 12 limit: 2fff done |
| PCI: 00:01.0 prefmem: base: 90000000 size: 12000000 align: 28 gran: 20 limit: a1ffffff |
| PCI: 00:01.0: Resource ranges: |
| * Base: 90000000, Size: 12000000, Tag: 1200 |
| PCI: 01:00.0 14 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem |
| PCI: 01:00.0 1c * [0xa0000000 - 0xa1ffffff] limit: a1ffffff prefmem |
| PCI: 00:01.0 prefmem: base: 90000000 size: 12000000 align: 28 gran: 20 limit: a1ffffff done |
| PCI: 00:01.0 mem: base: 83000000 size: 1100000 align: 24 gran: 20 limit: 840fffff |
| PCI: 00:01.0: Resource ranges: |
| * Base: 83000000, Size: 1100000, Tag: 200 |
| PCI: 01:00.0 10 * [0x83000000 - 0x83ffffff] limit: 83ffffff mem |
| PCI: 01:00.0 30 * [0x84000000 - 0x8407ffff] limit: 8407ffff mem |
| PCI: 01:00.1 10 * [0x84080000 - 0x84083fff] limit: 84083fff mem |
| PCI: 00:01.0 mem: base: 83000000 size: 1100000 align: 24 gran: 20 limit: 840fffff done |
| PCI: 00:1c.0 mem: base: 82200000 size: 100000 align: 20 gran: 20 limit: 822fffff |
| PCI: 00:1c.0: Resource ranges: |
| * Base: 82200000, Size: 100000, Tag: 200 |
| PCI: 02:00.0 10 * [0x82200000 - 0x82200fff] limit: 82200fff mem |
| PCI: 02:00.0 14 * [0x82201000 - 0x822017ff] limit: 822017ff mem |
| PCI: 00:1c.0 mem: base: 82200000 size: 100000 align: 20 gran: 20 limit: 822fffff done |
| PCI: 00:1c.1 mem: base: 82300000 size: 100000 align: 20 gran: 20 limit: 823fffff |
| PCI: 00:1c.1: Resource ranges: |
| * Base: 82300000, Size: 100000, Tag: 200 |
| PCI: 03:00.0 10 * [0x82300000 - 0x82303fff] limit: 82303fff mem |
| PCI: 00:1c.1 mem: base: 82300000 size: 100000 align: 20 gran: 20 limit: 823fffff done |
| === Resource allocator: DOMAIN: 0000 - resource allocation complete === |
| PCI: 00:01.0 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 01 io |
| PCI: 00:01.0 24 <- [0x0090000000 - 0x00a1ffffff] size 0x12000000 gran 0x14 bus 01 prefmem |
| PCI: 00:01.0 20 <- [0x0083000000 - 0x00840fffff] size 0x01100000 gran 0x14 bus 01 mem |
| PCI: 01:00.0 10 <- [0x0083000000 - 0x0083ffffff] size 0x01000000 gran 0x18 mem |
| PCI: 01:00.0 14 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64 |
| PCI: 01:00.0 1c <- [0x00a0000000 - 0x00a1ffffff] size 0x02000000 gran 0x19 prefmem64 |
| PCI: 01:00.0 24 <- [0x0000002000 - 0x000000207f] size 0x00000080 gran 0x07 io |
| PCI: 01:00.0 30 <- [0x0084000000 - 0x008407ffff] size 0x00080000 gran 0x13 romem |
| PCI: 01:00.1 10 <- [0x0084080000 - 0x0084083fff] size 0x00004000 gran 0x0e mem |
| PCI: 00:02.0 10 <- [0x0082400000 - 0x00827fffff] size 0x00400000 gran 0x16 mem64 |
| PCI: 00:02.0 18 <- [0x00b0000000 - 0x00bfffffff] size 0x10000000 gran 0x1c prefmem64 |
| PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io |
| PCI: 00:03.0 10 <- [0x0082838000 - 0x008283bfff] size 0x00004000 gran 0x0e mem64 |
| PCI: 00:04.0 10 <- [0x0082830000 - 0x0082837fff] size 0x00008000 gran 0x0f mem64 |
| PCI: 00:14.0 10 <- [0x0082820000 - 0x008282ffff] size 0x00010000 gran 0x10 mem64 |
| PCI: 00:16.0 10 <- [0x0082845000 - 0x008284500f] size 0x00000010 gran 0x04 mem64 |
| PCI: 00:19.0 10 <- [0x0082800000 - 0x008281ffff] size 0x00020000 gran 0x11 mem |
| PCI: 00:19.0 14 <- [0x0082840000 - 0x0082840fff] size 0x00001000 gran 0x0c mem |
| PCI: 00:19.0 18 <- [0x0000001040 - 0x000000105f] size 0x00000020 gran 0x05 io |
| PCI: 00:1a.0 10 <- [0x0082842000 - 0x00828423ff] size 0x00000400 gran 0x0a mem |
| PCI: 00:1b.0 10 <- [0x008283c000 - 0x008283ffff] size 0x00004000 gran 0x0e mem64 |
| PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io |
| PCI: 00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 02 prefmem |
| PCI: 00:1c.0 20 <- [0x0082200000 - 0x00822fffff] size 0x00100000 gran 0x14 bus 02 mem |
| PCI: 02:00.0 10 <- [0x0082200000 - 0x0082200fff] size 0x00001000 gran 0x0c mem |
| PCI: 02:00.0 14 <- [0x0082201000 - 0x00822017ff] size 0x00000800 gran 0x0b mem |
| PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io |
| PCI: 00:1c.1 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 03 prefmem |
| PCI: 00:1c.1 20 <- [0x0082300000 - 0x00823fffff] size 0x00100000 gran 0x14 bus 03 mem |
| PCI: 03:00.0 10 <- [0x0082300000 - 0x0082303fff] size 0x00004000 gran 0x0e mem64 |
| PCI: 00:1c.2 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 04 io |
| PCI: 00:1c.2 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 04 prefmem |
| PCI: 00:1c.2 20 <- [0x00ffffffff - 0x00fffffffe] size 0x00000000 gran 0x14 bus 04 mem |
| PCI: 00:1c.4 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 05 io |
| PCI: 00:1c.4 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 05 prefmem |
| PCI: 00:1c.4 20 <- [0x00ffffffff - 0x00fffffffe] size 0x00000000 gran 0x14 bus 05 mem |
| PCI: 00:1d.0 10 <- [0x0082843000 - 0x00828433ff] size 0x00000400 gran 0x0a mem |
| PNP: 00ff.1 missing set_resources |
| PNP: 00ff.2 missing set_resources |
| PCI: 00:1f.2 10 <- [0x0000001080 - 0x0000001087] size 0x00000008 gran 0x03 io |
| PCI: 00:1f.2 14 <- [0x0000001090 - 0x0000001093] size 0x00000004 gran 0x02 io |
| PCI: 00:1f.2 18 <- [0x0000001088 - 0x000000108f] size 0x00000008 gran 0x03 io |
| PCI: 00:1f.2 1c <- [0x0000001094 - 0x0000001097] size 0x00000004 gran 0x02 io |
| PCI: 00:1f.2 20 <- [0x0000001060 - 0x000000107f] size 0x00000020 gran 0x05 io |
| PCI: 00:1f.2 24 <- [0x0082841000 - 0x00828417ff] size 0x00000800 gran 0x0b mem |
| PCI: 00:1f.3 10 <- [0x0082844000 - 0x00828440ff] size 0x00000100 gran 0x08 mem64 |
| Done setting resources. |
| Done allocating resources. |
| BS: BS_DEV_RESOURCES run times (exec / console): 1 / 1 ms |
| Enabling resources... |
| PCI: 00:00.0 subsystem <- 17aa/2211 |
| PCI: 00:00.0 cmd <- 06 |
| PCI: 00:01.0 bridge ctrl <- 001b |
| PCI: 00:01.0 subsystem <- 17aa/2211 |
| PCI: 00:01.0 cmd <- 07 |
| PCI: 00:02.0 subsystem <- 17aa/221e |
| PCI: 00:02.0 cmd <- 03 |
| PCI: 00:03.0 subsystem <- 17aa/2211 |
| PCI: 00:03.0 cmd <- 02 |
| PCI: 00:04.0 cmd <- 02 |
| PCI: 00:14.0 subsystem <- 17aa/2211 |
| PCI: 00:14.0 cmd <- 102 |
| PCI: 00:16.0 subsystem <- 17aa/2211 |
| PCI: 00:16.0 cmd <- 02 |
| PCI: 00:19.0 subsystem <- 17aa/2210 |
| PCI: 00:19.0 cmd <- 103 |
| PCI: 00:1a.0 subsystem <- 17aa/2211 |
| PCI: 00:1a.0 cmd <- 102 |
| PCI: 00:1b.0 subsystem <- 17aa/2211 |
| PCI: 00:1b.0 cmd <- 102 |
| PCI: 00:1c.0 bridge ctrl <- 0013 |
| PCI: 00:1c.0 subsystem <- 17aa/2211 |
| PCI: 00:1c.0 cmd <- 06 |
| PCI: 00:1c.1 bridge ctrl <- 0013 |
| PCI: 00:1c.1 subsystem <- 17aa/2211 |
| PCI: 00:1c.1 cmd <- 06 |
| PCI: 00:1c.2 bridge ctrl <- 0013 |
| PCI: 00:1c.2 subsystem <- 17aa/2211 |
| PCI: 00:1c.2 cmd <- 00 |
| PCI: 00:1c.4 bridge ctrl <- 0013 |
| PCI: 00:1c.4 subsystem <- 17aa/2211 |
| PCI: 00:1c.4 cmd <- 00 |
| PCI: 00:1d.0 subsystem <- 17aa/2211 |
| PCI: 00:1d.0 cmd <- 102 |
| PCI: 00:1f.0 subsystem <- 17aa/2211 |
| PCI: 00:1f.0 cmd <- 107 |
| PCI: 00:1f.2 subsystem <- 17aa/2211 |
| PCI: 00:1f.2 cmd <- 103 |
| PCI: 00:1f.3 subsystem <- 17aa/2211 |
| PCI: 00:1f.3 cmd <- 103 |
| PCI: 01:00.0 cmd <- 03 |
| PCI: 01:00.1 cmd <- 02 |
| PCI: 02:00.0 cmd <- 06 |
| PCI: 03:00.0 cmd <- 02 |
| done. |
| Found TPM ST33ZP24 by ST Microelectronics |
| TPM: Startup |
| TPM: command 0x99 returned 0x0 |
| TPM: Asserting physical presence |
| TPM: command 0x4000000a returned 0x0 |
| TPM: command 0x65 returned 0x0 |
| TPM: flags disable=0, deactivated=0, nvlocked=1 |
| TPM: setup succeeded |
| BS: BS_DEV_INIT entry times (exec / console): 64 / 0 ms |
| Initializing devices... |
| CPU_CLUSTER: 0 init |
| MTRR: Physical address space: |
| 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 |
| 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 |
| 0x00000000000c0000 - 0x0000000080000000 size 0x7ff40000 type 6 |
| 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 0 |
| 0x0000000090000000 - 0x00000000a2000000 size 0x12000000 type 1 |
| 0x00000000a2000000 - 0x00000000b0000000 size 0x0e000000 type 0 |
| 0x00000000b0000000 - 0x00000000c0000000 size 0x10000000 type 1 |
| 0x00000000c0000000 - 0x0000000100000000 size 0x40000000 type 0 |
| 0x0000000100000000 - 0x000000047de00000 size 0x37de00000 type 6 |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| CPU physical address size: 39 bits |
| MTRR: default type WB/UC MTRR counts: 8/7. |
| MTRR: UC selected as default type. |
| MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6 |
| MTRR: 1 base 0x0000000090000000 mask 0x0000007ff0000000 type 1 |
| MTRR: 2 base 0x00000000a0000000 mask 0x0000007ffe000000 type 1 |
| MTRR: 3 base 0x00000000b0000000 mask 0x0000007ff0000000 type 1 |
| MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6 |
| MTRR: 5 base 0x0000000200000000 mask 0x0000007e00000000 type 6 |
| MTRR: 6 base 0x0000000400000000 mask 0x0000007f80000000 type 6 |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Initializing VR config. |
| CPU has 4 cores, 8 threads enabled. |
| Setting up SMI for CPU |
| Will perform SMM setup. |
| CBFS: Found 'cpu_microcode_blob.bin' @0x8d40 size 0xb400 in mcache @0x7f7dd0ac |
| microcode: sig=0x306c3 pf=0x10 revision=0x28 |
| CPU: Intel(R) Core(TM) i7-4800MQ CPU @ 2.70GHz. |
| Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170 |
| Processing 16 relocs. Offset value of 0x00030000 |
| Attempting to start 7 APs |
| Waiting for 10ms after sending INIT. |
| Waiting for 1st SIPI to complete...done. |
| Waiting for 2nd SIPI to complete...done. |
| AP: slot 1 apic_id 1, MCU rev: 0x00000028 |
| AP: slot 2 apic_id 2, MCU rev: 0x00000028 |
| AP: slot 3 apic_id 3, MCU rev: 0x00000028 |
| AP: slot 4 apic_id 4, MCU rev: 0x00000028 |
| AP: slot 6 apic_id 5, MCU rev: 0x00000028 |
| AP: slot 7 apic_id 6, MCU rev: 0x00000028 |
| AP: slot 5 apic_id 7, MCU rev: 0x00000028 |
| smm_stub_place_stacks: cpus: 8 : stack space: needed -> 2000 |
| smm_stub_place_stacks: exit, stack_top 0x7f802000 |
| Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1e8 memsize: 0x1e8 |
| Processing 11 relocs. Offset value of 0x00038000 |
| smm_module_setup_stub: stack_end = 0x7f800000 |
| smm_module_setup_stub: stack_top = 0x7f802000 |
| smm_module_setup_stub: stack_size = 0x400 |
| smm_module_setup_stub: runtime.start32_offset = 0x4c |
| smm_module_setup_stub: runtime.smm_size = 0x10000 |
| SMM Module: stub loaded at 0x00038000. Will call 0x7f79d0eb |
| Installing permanent SMM handler to 0x7f800000 |
| smm_load_module: total_smm_space_needed b570, available -> 300000 |
| Loading module at 0x7faf7000 with entry 0x7faf7dc8. filesize: 0x4440 memsize: 0x8570 |
| Processing 272 relocs. Offset value of 0x7faf7000 |
| smm_load_module: smram_start: 0x0x7f800000 |
| smm_load_module: smram_end: 0x7fb00000 |
| smm_load_module: stack_top: 0x7f802000 |
| smm_load_module: handler start 0x7faf7dc8 |
| smm_load_module: handler_size 8ae0 |
| smm_load_module: fxsave_area 0x7faff000 |
| smm_load_module: fxsave_size 1000 |
| smm_load_module: CONFIG_MSEG_SIZE 0x0 |
| smm_load_module: CONFIG_BIOS_RESOURCE_LIST_SIZE 0x0 |
| smm_load_module: handler_mod_params.smbase = 0x7f800000 |
| smm_load_module: per_cpu_save_state_size = 0x400 |
| smm_load_module: num_cpus = 0x8 |
| smm_load_module: total_save_state_size = 0x2000 |
| smm_load_module: cpu0 entry: 0x7fae7000 |
| smm_create_map: cpus allowed in one segment 30 |
| smm_create_map: min # of segments needed 1 |
| CPU 0x0 |
| smbase 7fae7000 entry 7faef000 |
| ss_start 7faf6c00 code_end 7faef1e8 |
| CPU 0x1 |
| smbase 7fae6c00 entry 7faeec00 |
| ss_start 7faf6800 code_end 7faeede8 |
| CPU 0x2 |
| smbase 7fae6800 entry 7faee800 |
| ss_start 7faf6400 code_end 7faee9e8 |
| CPU 0x3 |
| smbase 7fae6400 entry 7faee400 |
| ss_start 7faf6000 code_end 7faee5e8 |
| CPU 0x4 |
| smbase 7fae6000 entry 7faee000 |
| ss_start 7faf5c00 code_end 7faee1e8 |
| CPU 0x5 |
| smbase 7fae5c00 entry 7faedc00 |
| ss_start 7faf5800 code_end 7faedde8 |
| CPU 0x6 |
| smbase 7fae5800 entry 7faed800 |
| ss_start 7faf5400 code_end 7faed9e8 |
| CPU 0x7 |
| smbase 7fae5400 entry 7faed400 |
| ss_start 7faf5000 code_end 7faed5e8 |
| smm_stub_place_stacks: cpus: 8 : stack space: needed -> 2000 |
| smm_stub_place_stacks: exit, stack_top 0x7f802000 |
| Loading module at 0x7faef000 with entry 0x7faef000. filesize: 0x1e8 memsize: 0x1e8 |
| Processing 11 relocs. Offset value of 0x7faef000 |
| smm_place_entry_code: smbase 7fae5400, stack_top 7f802000 |
| SMM Module: placing smm entry code at 7faeec00, cpu # 0x1 |
| smm_place_entry_code: copying from 7faef000 to 7faeec00 0x1e8 bytes |
| SMM Module: placing smm entry code at 7faee800, cpu # 0x2 |
| smm_place_entry_code: copying from 7faef000 to 7faee800 0x1e8 bytes |
| SMM Module: placing smm entry code at 7faee400, cpu # 0x3 |
| smm_place_entry_code: copying from 7faef000 to 7faee400 0x1e8 bytes |
| SMM Module: placing smm entry code at 7faee000, cpu # 0x4 |
| smm_place_entry_code: copying from 7faef000 to 7faee000 0x1e8 bytes |
| SMM Module: placing smm entry code at 7faedc00, cpu # 0x5 |
| smm_place_entry_code: copying from 7faef000 to 7faedc00 0x1e8 bytes |
| SMM Module: placing smm entry code at 7faed800, cpu # 0x6 |
| smm_place_entry_code: copying from 7faef000 to 7faed800 0x1e8 bytes |
| SMM Module: placing smm entry code at 7faed400, cpu # 0x7 |
| smm_place_entry_code: copying from 7faef000 to 7faed400 0x1e8 bytes |
| smm_module_setup_stub: stack_end = 0x7f800000 |
| smm_module_setup_stub: stack_top = 0x7f802000 |
| smm_module_setup_stub: stack_size = 0x400 |
| smm_module_setup_stub: runtime.start32_offset = 0x4c |
| smm_module_setup_stub: runtime.smm_size = 0x300000 |
| SMM Module: stub loaded at 0x7faef000. Will call 0x7faf7dc8 |
| Initializing Southbridge SMI... |
| SMI_STS: MCSMI PM1 |
| TMROF smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7fae7000, cpu = 0 |
| In relocation handler: CPU 0 |
| New SMBASE=0x7fae7000 IEDBASE=0x7fc00000 |
| Writing SMRR. base = 0x7f800006, mask=0xff800800 |
| Relocation complete. |
| microcode: Update skipped, already up-to-date |
| smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7fae6c00, cpu = 1 |
| In relocation handler: CPU 1 |
| New SMBASE=0x7fae6c00 IEDBASE=0x7fc00000 |
| Writing SMRR. base = 0x7f800006, mask=0xff800800 |
| Relocation complete. |
| microcode: Update skipped, already up-to-date |
| smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7fae6800, cpu = 2 |
| In relocation handler: CPU 2 |
| New SMBASE=0x7fae6800 IEDBASE=0x7fc00000 |
| Writing SMRR. base = 0x7f800006, mask=0xff800800 |
| Relocation complete. |
| microcode: Update skipped, already up-to-date |
| smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7fae6400, cpu = 3 |
| In relocation handler: CPU 3 |
| New SMBASE=0x7fae6400 IEDBASE=0x7fc00000 |
| Writing SMRR. base = 0x7f800006, mask=0xff800800 |
| Relocation complete. |
| microcode: Update skipped, already up-to-date |
| smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7fae5800, cpu = 6 |
| In relocation handler: CPU 6 |
| New SMBASE=0x7fae5800 IEDBASE=0x7fc00000 |
| Writing SMRR. base = 0x7f800006, mask=0xff800800 |
| Relocation complete. |
| microcode: Update skipped, already up-to-date |
| smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7fae6000, cpu = 4 |
| In relocation handler: CPU 4 |
| New SMBASE=0x7fae6000 IEDBASE=0x7fc00000 |
| Writing SMRR. base = 0x7f800006, mask=0xff800800 |
| Relocation complete. |
| microcode: Update skipped, already up-to-date |
| smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7fae5400, cpu = 7 |
| In relocation handler: CPU 7 |
| New SMBASE=0x7fae5400 IEDBASE=0x7fc00000 |
| Writing SMRR. base = 0x7f800006, mask=0xff800800 |
| Relocation complete. |
| microcode: Update skipped, already up-to-date |
| smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7fae5c00, cpu = 5 |
| In relocation handler: CPU 5 |
| New SMBASE=0x7fae5c00 IEDBASE=0x7fc00000 |
| Writing SMRR. base = 0x7f800006, mask=0xff800800 |
| Relocation complete. |
| microcode: Update skipped, already up-to-date |
| Initializing CPU #0 |
| CPU: vendor Intel device 306c3 |
| CPU: family 06, model 3c, stepping 03 |
| Setting up local APIC... |
| apic_id: 0x0 done. |
| IA32_FEATURE_CONTROL already locked; VMX status: enabled |
| IA32_FEATURE_CONTROL already locked |
| cpu: energy policy set to 6 |
| Turbo is available but hidden |
| Turbo is available and visible |
| CPU #0 initialized |
| Initializing CPU #1 |
| Initializing CPU #3 |
| Initializing CPU #2 |
| CPU: vendor Intel device 306c3 |
| CPU: family 06, model 3c, stepping 03 |
| CPU: vendor Intel device 306c3 |
| CPU: family 06, model 3c, stepping 03 |
| Initializing CPU #6 |
| Initializing CPU #4 |
| CPU: vendor Intel device 306c3 |
| CPU: family 06, model 3c, stepping 03 |
| CPU: vendor Intel device 306c3 |
| CPU: family 06, model 3c, stepping 03 |
| CPU: vendor Intel device 306c3 |
| CPU: family 06, model 3c, stepping 03 |
| Setting up local APIC... |
| Setting up local APIC... |
| Setting up local APIC... |
| Setting up local APIC... |
| apic_id: 0x2 done. |
| apic_id: 0x5 done. |
| apic_id: 0x4 done. |
| IA32_FEATURE_CONTROL already locked; VMX status: enabled |
| IA32_FEATURE_CONTROL already locked; VMX status: enabled |
| IA32_FEATURE_CONTROL already locked |
| Initializing CPU #7 |
| Initializing CPU #5 |
| IA32_FEATURE_CONTROL already locked |
| Setting up local APIC... |
| CPU: vendor Intel device 306c3 |
| CPU: family 06, model 3c, stepping 03 |
| CPU: vendor Intel device 306c3 |
| CPU: family 06, model 3c, stepping 03 |
| apic_id: 0x1 done. |
| IA32_FEATURE_CONTROL already locked; VMX status: enabled |
| IA32_FEATURE_CONTROL already locked; VMX status: enabled |
| cpu: energy policy set to 6 |
| cpu: energy policy set to 6 |
| CPU #4 initialized |
| IA32_FEATURE_CONTROL already locked |
| Setting up local APIC... |
| Setting up local APIC... |
| apic_id: 0x3 done. |
| IA32_FEATURE_CONTROL already locked |
| IA32_FEATURE_CONTROL already locked; VMX status: enabled |
| apic_id: 0x7 done. |
| apic_id: 0x6 done. |
| IA32_FEATURE_CONTROL already locked; VMX status: enabled |
| CPU #6 initialized |
| IA32_FEATURE_CONTROL already locked; VMX status: enabled |
| IA32_FEATURE_CONTROL already locked |
| cpu: energy policy set to 6 |
| CPU #1 initialized |
| cpu: energy policy set to 6 |
| CPU #2 initialized |
| IA32_FEATURE_CONTROL already locked |
| IA32_FEATURE_CONTROL already locked |
| cpu: energy policy set to 6 |
| CPU #3 initialized |
| cpu: energy policy set to 6 |
| CPU #5 initialized |
| cpu: energy policy set to 6 |
| CPU #7 initialized |
| bsp_do_flight_plan done after 2 msecs. |
| CPU: frequency set to 3700 |
| Enabling SMIs. |
| Locking SMM. |
| CPU_CLUSTER: 0 init finished in 17 msecs |
| PCI: 00:00.0 init |
| Disabling PEG12. |
| Disabling PEG11. |
| Disabling "device 7". |
| Set BIOS_RESET_CPL |
| CPU TDP: 47 Watts |
| PCI: 00:00.0 init finished in 1 msecs |
| PCI: 00:01.0 init |
| PCI: 00:01.0 init finished in 0 msecs |
| PCI: 00:02.0 init |
| CBFS: Found 'vbt.bin' @0x35600 size 0x58f in mcache @0x7f7dd1f4 |
| Found a VBT of 4400 bytes after decompression |
| GMA: Found VBT in CBFS |
| GMA: Found valid VBT in CBFS |
| GT Power Management Init |
| GMA: Setting backlight PWM frequency to 135MHz / 128 / 4794 = 220Hz |
| |
| [0.806777] CONFIG => |
| [0.806778] (Primary => |
| [0.806778] (Port => DP3 , |
| [0.806779] Framebuffer => |
| [0.806779] (Width => 1920, |
| [0.806780] Height => 1080, |
| [0.806780] Start_X => 0, |
| [0.806781] Start_Y => 0, |
| [0.806781] Stride => 1920, |
| [0.806782] V_Stride => 1080, |
| [0.806782] Tiling => Linear , |
| [0.806783] Rotation => No_Rotation, |
| [0.806783] Offset => 0x00000000, |
| [0.806784] BPC => 8), |
| [0.806784] Mode => |
| [0.806784] (Dotclock => 139770000, |
| [0.806785] H_Visible => 1920, |
| [0.806785] H_Sync_Begin => 1968, |
| [0.806786] H_Sync_End => 2000, |
| [0.806786] H_Total => 2080, |
| [0.806787] V_Visible => 1080, |
| [0.806787] V_Sync_Begin => 1083, |
| [0.806788] V_Sync_End => 1089, |
| [0.806788] V_Total => 1120, |
| [0.806789] H_Sync_Active_High => False, |
| [0.806789] V_Sync_Active_High => False, |
| [0.806790] BPC => 6)), |
| [0.806790] Secondary => |
| [0.806791] (Port => Disabled, |
| [0.806791] Framebuffer => |
| [0.806791] (Width => 1, |
| [0.806792] Height => 1, |
| [0.806792] Start_X => 0, |
| [0.806793] Start_Y => 0, |
| [0.806793] Stride => 1, |
| [0.806794] V_Stride => 1, |
| [0.806794] Tiling => Linear , |
| [0.806795] Rotation => No_Rotation, |
| [0.806795] Offset => 0x00000000, |
| [0.806796] BPC => 8), |
| [0.806796] Mode => |
| [0.806796] (Dotclock => 1000000, |
| [0.806797] H_Visible => 1, |
| [0.806797] H_Sync_Begin => 1, |
| [0.806798] H_Sync_End => 1, |
| [0.806798] H_Total => 1, |
| [0.806799] V_Visible => 1, |
| [0.806799] V_Sync_Begin => 1, |
| [0.806800] V_Sync_End => 1, |
| [0.806800] V_Total => 1, |
| [0.806801] H_Sync_Active_High => False, |
| [0.806801] V_Sync_Active_High => False, |
| [0.806802] BPC => 5)), |
| [0.806802] Tertiary => |
| [0.806803] (Port => Disabled, |
| [0.806803] Framebuffer => |
| [0.806803] (Width => 1, |
| [0.806804] Height => 1, |
| [0.806804] Start_X => 0, |
| [0.806805] Start_Y => 0, |
| [0.806805] Stride => 1, |
| [0.806805] V_Stride => 1, |
| [0.806806] Tiling => Linear , |
| [0.806806] Rotation => No_Rotation, |
| [0.806807] Offset => 0x00000000, |
| [0.806807] BPC => 8), |
| [0.806808] Mode => |
| [0.806808] (Dotclock => 1000000, |
| [0.806809] H_Visible => 1, |
| [0.806809] H_Sync_Begin => 1, |
| [0.806810] H_Sync_End => 1, |
| [0.806810] H_Total => 1, |
| [0.806811] V_Visible => 1, |
| [0.806811] V_Sync_Begin => 1, |
| [0.806812] V_Sync_End => 1, |
| [0.806812] V_Total => 1, |
| [0.806813] H_Sync_Active_High => False, |
| [0.806813] V_Sync_Active_High => False, |
| [0.806814] BPC => 5))); |
| framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32 |
| x_res x y_res: 1920 x 1080, size: 8294400 at 0xb0000000 |
| GT Power Management Init (post VBIOS) |
| PCI: 00:02.0 init finished in 710 msecs |
| PCI: 00:03.0 init |
| Mini-HD: base = 0x82838000 |
| HDA: Initializing codec #0 |
| HDA: codec viddid: 80862807 |
| HDA: verb loaded. |
| PCI: 00:03.0 init finished in 3 msecs |
| PCI: 00:04.0 init |
| PCI: 00:04.0 init finished in 0 msecs |
| PCI: 00:14.0 init |
| PCI: 00:14.0 init finished in 0 msecs |
| PCI: 00:16.0 init |
| ME: FW Partition Table : OK |
| ME: Bringup Loader Failure : NO |
| ME: Firmware Init Complete : NO |
| ME: Manufacturing Mode : YES |
| ME: Boot Options Present : NO |
| ME: Update In Progress : NO |
| ME: Current Working State : Initializing |
| ME: Current Operation State : Bring up |
| ME: Current Operation Mode : Debug |
| ME: Error Code : No Error |
| ME: Progress Phase : BUP Phase |
| ME: Power Management Event : Pseudo-global reset |
| ME: Progress Phase State : 0x4d |
| intel_me_path: mbp is not ready! |
| ME: BIOS path: Error |
| ME: MBP not ready |
| PCI: 00:16.0 init finished in 0 msecs |
| PCI: 00:19.0 init |
| PCI: 00:19.0 init finished in 0 msecs |
| PCI: 00:1a.0 init |
| EHCI: Setting up controller.. done. |
| PCI: 00:1a.0 init finished in 0 msecs |
| PCI: 00:1b.0 init |
| Azalia: base = 0x8283c000 |
| Azalia: codec_mask = 01 |
| HDA: Initializing codec #0 |
| HDA: codec viddid: 10ec0292 |
| HDA: verb loaded. |
| PCI: 00:1b.0 init finished in 8 msecs |
| PCI: 00:1c.0 init |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.0 init finished in 0 msecs |
| PCI: 00:1c.1 init |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.1 init finished in 0 msecs |
| PCI: 00:1c.2 init |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.2 init finished in 0 msecs |
| PCI: 00:1c.4 init |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.4 init finished in 0 msecs |
| PCI: 00:1d.0 init |
| EHCI: Setting up controller.. done. |
| PCI: 00:1d.0 init finished in 0 msecs |
| PCI: 00:1f.0 init |
| pch: lpc_init |
| IOAPIC: Initializing IOAPIC at 0xfec00000 |
| IOAPIC: ID = 0x02 |
| Set power off after power failure. |
| NMI sources enabled. |
| LynxPoint H PM init |
| RTC: failed = 0x0 |
| RTC Init |
| apm_control: Disabling ACPI. |
| APMC done. |
| PCI: 00:1f.0 init finished in 0 msecs |
| PCI: 00:1f.2 init |
| SATA: Initializing... |
| SATA: Controller in AHCI mode. |
| ABAR: 0x82841000 |
| PCI: 00:1f.2 init finished in 0 msecs |
| PCI: 00:1f.3 init |
| PCI: 00:1f.3 init finished in 0 msecs |
| PCI: 01:00.0 init |
| PCI: 01:00.0 init finished in 0 msecs |
| PCI: 01:00.1 init |
| PCI: 01:00.1 init finished in 0 msecs |
| PCI: 02:00.0 init |
| PCI: 02:00.0 init finished in 0 msecs |
| PCI: 03:00.0 init |
| PCI: 03:00.0 init finished in 0 msecs |
| PNP: 00ff.2 init |
| PNP: 00ff.2 init finished in 0 msecs |
| Devices initialized |
| BS: BS_DEV_INIT run times (exec / console): 741 / 1 ms |
| FMAP: area SMMSTORE found @ 810000 (262144 bytes) |
| smm store: 4 # blocks with size 0x10000 |
| SMMSTORE: Setting up SMI handler |
| Finalize devices... |
| PCI: 00:00.0 final |
| PCI: 00:16.0 final |
| ME: MBP cleared |
| PCI: 00:1b.0 final |
| PCI: 00:1f.0 final |
| apm_control: Finalizing SMM. |
| APMC done. |
| Devices finalized |
| CBFS: Found 'fallback/dsdt.aml' @0x31f40 size 0x3677 in mcache @0x7f7dd1c8 |
| CBFS: 'fallback/slic' not found. |
| ACPI: Writing ACPI tables at 7f72f000. |
| ACPI: * FACS |
| ACPI: * DSDT |
| ACPI: * FADT |
| ACPI: added table 1/32, length now 40 |
| ACPI: * SSDT |
| Found 1 CPU(s) with 8 core(s) each. |
| PSS: 2701MHz power 47000 control 0x2500 status 0x2500 |
| PSS: 2700MHz power 47000 control 0x1b00 status 0x1b00 |
| PSS: 2000MHz power 32032 control 0x1400 status 0x1400 |
| PSS: 1600MHz power 24429 control 0x1000 status 0x1000 |
| PSS: 1200MHz power 17445 control 0xc00 status 0xc00 |
| PSS: 800MHz power 11060 control 0x800 status 0x800 |
| PSS: 2701MHz power 47000 control 0x2500 status 0x2500 |
| PSS: 2700MHz power 47000 control 0x1b00 status 0x1b00 |
| PSS: 2000MHz power 32032 control 0x1400 status 0x1400 |
| PSS: 1600MHz power 24429 control 0x1000 status 0x1000 |
| PSS: 1200MHz power 17445 control 0xc00 status 0xc00 |
| PSS: 800MHz power 11060 control 0x800 status 0x800 |
| PSS: 2701MHz power 47000 control 0x2500 status 0x2500 |
| PSS: 2700MHz power 47000 control 0x1b00 status 0x1b00 |
| PSS: 2000MHz power 32032 control 0x1400 status 0x1400 |
| PSS: 1600MHz power 24429 control 0x1000 status 0x1000 |
| PSS: 1200MHz power 17445 control 0xc00 status 0xc00 |
| PSS: 800MHz power 11060 control 0x800 status 0x800 |
| PSS: 2701MHz power 47000 control 0x2500 status 0x2500 |
| PSS: 2700MHz power 47000 control 0x1b00 status 0x1b00 |
| PSS: 2000MHz power 32032 control 0x1400 status 0x1400 |
| PSS: 1600MHz power 24429 control 0x1000 status 0x1000 |
| PSS: 1200MHz power 17445 control 0xc00 status 0xc00 |
| PSS: 800MHz power 11060 control 0x800 status 0x800 |
| PSS: 2701MHz power 47000 control 0x2500 status 0x2500 |
| PSS: 2700MHz power 47000 control 0x1b00 status 0x1b00 |
| PSS: 2000MHz power 32032 control 0x1400 status 0x1400 |
| PSS: 1600MHz power 24429 control 0x1000 status 0x1000 |
| PSS: 1200MHz power 17445 control 0xc00 status 0xc00 |
| PSS: 800MHz power 11060 control 0x800 status 0x800 |
| PSS: 2701MHz power 47000 control 0x2500 status 0x2500 |
| PSS: 2700MHz power 47000 control 0x1b00 status 0x1b00 |
| PSS: 2000MHz power 32032 control 0x1400 status 0x1400 |
| PSS: 1600MHz power 24429 control 0x1000 status 0x1000 |
| PSS: 1200MHz power 17445 control 0xc00 status 0xc00 |
| PSS: 800MHz power 11060 control 0x800 status 0x800 |
| PSS: 2701MHz power 47000 control 0x2500 status 0x2500 |
| PSS: 2700MHz power 47000 control 0x1b00 status 0x1b00 |
| PSS: 2000MHz power 32032 control 0x1400 status 0x1400 |
| PSS: 1600MHz power 24429 control 0x1000 status 0x1000 |
| PSS: 1200MHz power 17445 control 0xc00 status 0xc00 |
| PSS: 800MHz power 11060 control 0x800 status 0x800 |
| PSS: 2701MHz power 47000 control 0x2500 status 0x2500 |
| PSS: 2700MHz power 47000 control 0x1b00 status 0x1b00 |
| PSS: 2000MHz power 32032 control 0x1400 status 0x1400 |
| PSS: 1600MHz power 24429 control 0x1000 status 0x1000 |
| PSS: 1200MHz power 17445 control 0xc00 status 0xc00 |
| PSS: 800MHz power 11060 control 0x800 status 0x800 |
| Generating ACPI PIRQ entries |
| ACPI: * H8 |
| H8: BDC detection not implemented. Assuming BDC installed |
| H8: WWAN detection not implemented. Assuming WWAN installed |
| PPI: Pending OS request: 0x5ffed31d (0xd5d799cf) |
| PPI: OS response: CMD 0xe0431bba = 0xcb69cd69 |
| \_SB.PCI0.LPCB.TPM.TPM: LPC TPM PNP: 0c31.0 |
| CBFS: 'pci10de,11fc.rom' not found. |
| PCI Option ROM loading disabled for PCI: 01:00.0 |
| PCI: 01:00.0: Missing PCI Option ROM |
| ACPI: added table 2/32, length now 44 |
| ACPI: * MCFG |
| ACPI: added table 3/32, length now 48 |
| ACPI: * TCPA |
| TCPA log created at 0x7f71f000 |
| ACPI: added table 4/32, length now 52 |
| ACPI: * MADT |
| ACPI: added table 5/32, length now 56 |
| current = 7f735730 |
| ACPI: * DMAR |
| ACPI: added table 6/32, length now 60 |
| ACPI: * HPET |
| ACPI: added table 7/32, length now 64 |
| current = 7f735830 |
| ACPI: done. |
| ACPI tables: 26672 bytes. |
| smbios_write_tables: 7f71e000 |
| SMBIOS firmware version is set to coreboot_version: '4.14-564-ga5061f8f57' |
| Create SMBIOS type 16 |
| Create SMBIOS type 17 |
| PCI: 03:00.0 (unknown) |
| SMBIOS tables: 1015 bytes. |
| Writing table forward entry at 0x00000500 |
| Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 5069 |
| Writing coreboot table at 0x7f753000 |
| CBFS: Found 'cmos_layout.bin' @0x35d00 size 0x4b4 in mcache @0x7f7dd24c |
| 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES |
| 1. 0000000000001000-000000000009ffff: RAM |
| 2. 00000000000a0000-00000000000fffff: RESERVED |
| 3. 0000000000100000-000000007f71dfff: RAM |
| 4. 000000007f71e000-000000007f77dfff: CONFIGURATION TABLES |
| 5. 000000007f77e000-000000007f7cefff: RAMSTAGE |
| 6. 000000007f7cf000-000000007f7fffff: CONFIGURATION TABLES |
| 7. 000000007f800000-00000000821fffff: RESERVED |
| 8. 00000000f0000000-00000000f3ffffff: RESERVED |
| 9. 00000000fed10000-00000000fed19fff: RESERVED |
| 10. 00000000fed40000-00000000fed44fff: RESERVED |
| 11. 00000000fed84000-00000000fed84fff: RESERVED |
| 12. 00000000fed90000-00000000fed91fff: RESERVED |
| 13. 0000000100000000-000000047ddfffff: RAM |
| Wrote coreboot table at: 0x7f753000, 0x93a bytes, checksum 4a9f |
| coreboot table: 2386 bytes. |
| IMD ROOT 0. 0x7f7ff000 0x00001000 |
| IMD SMALL 1. 0x7f7fe000 0x00001000 |
| CONSOLE 2. 0x7f7de000 0x00020000 |
| RO MCACHE 3. 0x7f7dd000 0x00000368 |
| TIME STAMP 4. 0x7f7dc000 0x00000910 |
| MRC DATA 5. 0x7f7db000 0x00000fe4 |
| ROMSTG STCK 6. 0x7f7da000 0x00001000 |
| AFTER CAR 7. 0x7f7cf000 0x0000b000 |
| RAMSTAGE 8. 0x7f77d000 0x00052000 |
| SMM BACKUP 9. 0x7f76d000 0x00010000 |
| 4f444749 10. 0x7f76b000 0x00002000 |
| 53534d32 11. 0x7f75b000 0x00010000 |
| COREBOOT 12. 0x7f753000 0x00008000 |
| ACPI 13. 0x7f72f000 0x00024000 |
| TCPA TCGLOG14. 0x7f71f000 0x00010000 |
| SMBIOS 15. 0x7f71e000 0x00000800 |
| IMD small region: |
| IMD ROOT 0. 0x7f7fec00 0x00000400 |
| FMAP 1. 0x7f7feae0 0x0000010a |
| MEM INFO 2. 0x7f7fe900 0x000001e0 |
| ROMSTAGE 3. 0x7f7fe8e0 0x00000004 |
| ACPI GNVS 4. 0x7f7fe820 0x000000b0 |
| 54505049 5. 0x7f7fe6c0 0x0000015a |
| BS: BS_WRITE_TABLES run times (exec / console): 5 / 0 ms |
| CBFS: Found 'fallback/payload' @0x3b2c0 size 0x12f6b2 in mcache @0x7f7dd2b8 |
| Checking segment from ROM address 0xffc8b4ec |
| Checking segment from ROM address 0xffc8b508 |
| Loading segment from ROM address 0xffc8b4ec |
| code (compression=2) |
| New segment dstaddr 0x00800000 memsize 0x800000 srcaddr 0xffc8b524 filesize 0x12f67a |
| Loading Segment: addr: 0x00800000 memsz: 0x0000000000800000 filesz: 0x000000000012f67a |
| using LZ4 |
| Loading segment from ROM address 0xffc8b508 |
| Entry Point 0x00803130 |
| BS: BS_PAYLOAD_LOAD run times (exec / console): 846 / 0 ms |
| ICH-NM10-PCH: watchdog disabled |
| Jumping to boot code at 0x00803130(0x7f753000) |
| |